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STLC5466 数据表(PDF) 113 Page - STMicroelectronics

部件名 STLC5466
功能描述  64 CHANNEL-MULTI HDLC WITH N X 64KB/S SWITCHING MATRIX ASSOCIATED
PDF  130 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STLC5466 数据表(HTML) 113 Page - STMicroelectronics

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STLC5466
4.2
ST10/C16x mult. A/D; MOD0 = 1, MOD1 = 0, MOD2 = 1
Figure 4-3: ST10 (C16x) read cycle; multiplexed A/D
tx
Parameter
T min
T max
Unit
t1
Delay NOT READY /NRD (if NCS0/1=0), (30 pF)
Delay when immediate access
0
98
ns
ns
t2
Hold time Chip Select / NRD
10
ns
t3
Delay NOT READY / NRD rising edge
Delay when immediate access
0
98
ns
ns
t4
Width ALE
20
ns
t5
Set up time Address /ALE
5
ns
t6
Hold time Address /ALE
5
ns
t7
Data valid before ready
0
ns
t8
Data bus at high impedance after NRD (30 pF)
0
15
ns
t9
Set up time NBHE, AddressA16/23 /ALE
5
ns
t10
Hold time NBHE / NRD
10
ns
t12
Delay NRD / NCS
0
ns
NCS0/1
NDSACK0 /
NDTACK /
NREADY
NAS /
ALE
NDS /
NRD
AD0/15
R/W /
NWR
NBHE
A16/23
A0/15
D0/15
t3
t2
t1
t4
t6
t5
t7
t8
t9
t12
t10



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