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STM8AP5X2ATAY 数据表(PDF) 77 Page - STMicroelectronics |
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STM8AP5X2ATAY 数据表(HTML) 77 Page - STMicroelectronics |
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77 / 100 page  STM8AF61xx, STM8AF51xx Electrical characteristics 77/100 Figure 35. Typical NRST pull-up resistance RPU vs VDD @ four temperatures Figure 36. Typical NRST pull-up current Ipu vs VDD @ four temperatures The reset network shown in Figure 37 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below the VIL max. level specified in Table 30 . Otherwise the reset is not taken into account internally. Figure 37. Recommended reset pin protection 30 35 40 45 50 55 60 2.5 3 3.5 4 4.5 5 5.5 6 V DD [V] -40°C 25°C 85°C 125°C 0 20 40 60 80 100 120 140 01 2 3 4 5 6 V DD [V] -40°C 25°C 85°C 125°C 0.01¬µ External reset circuit STM8A Filter RPU VDD Internal reset NRST |
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