STM8AP5X2ATAY datasheet(18/100 Pages) STMICROELECTRONICS

18 / 100 page

Product overview

STM8AF61xx, STM8AF51xx

18/100

5.7

Timers

5.7.1

Watchdog timers

The watchdog system is based on two independent timers providing maximum security to

the applications.

The WDG timer activity is controlled by the application program or option bytes. Once the

watchdog is activated, it cannot be disabled by the user program without a reset.

Window watchdog timer

The window watchdog is used to detect the occurrence of a software fault, usually

generated by external interferences or by unexpected logical conditions, which cause the

application program to abandon its normal sequence.

The window function can be used to trim the watchdog behavior to match the application

perfectly.

The application software must refresh the counter before time-out and during a limited time

window.

A reset is generated in two situations:

Timeout

Refresh out of window: The downcounter is refreshed before its value is lower then the

one stored in the window register.

Independent watchdog timer

The independent watchdog peripheral can be used to resolve processor malfunctions due to

hardware or software failures.

It is clocked by the 128 kHz LSI internal RC clock source, and thus stays active even in case

of a CPU clock failure. If the hardware watchdog feature is enabled through the device

option bits, the watchdog is automatically enabled at power-on, and generates a reset

unless the key register is written by software before the counter reaches the end of count.

The IWDG time base spans from 60 µs to 1 s. It can be adjusted by setting the registers of

the 7-bit prescaler and 8-bit down-counter.

5.7.2

Auto wake-up counter

●

Used for auto wake-up from active halt mode.

●

Clock source: Internal 128 kHz internal low frequency RC oscillator or external clock.

STM8AP5X2ATAY 数据表(PDF) 18 Page - STMicroelectronics

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