STM8AP5X2ATAY datasheet(22/100 Pages) STMICROELECTRONICS

22 / 100 page

Product overview

STM8AF61xx, STM8AF51xx

22/100

5.9.2

LINUART

Main features

●

LIN master/slave rev. 2.1 compliant

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Auto-synchronization in LIN slave mode

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16-bit baud rate prescaler

●

1 Mbit full duplex SCI

LIN master

●

Autonomous header handling

●

13-bit LIN synch break generation

LIN slave

●

Autonomous header handling - one single interrupt per valid message header

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Automatic baud rate synchronization - maximum tolerated initial clock deviation ±15 %

●

Synch delimiter checking

●

11-bit LIN synch break detection - break detection always active

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Parity check on the LIN identifier field

●

LIN error management

●

Hot plugging support

Asynchronous communication (UART)

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Full duplex, asynchronous communications - NRZ standard format (mark/space)

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Independently programmable transmit and receive baud rates up to 500 Kbit/s

●

Programmable data word length (8 or 9 bits)

●

Low-power standby mode - two receiver wake-up modes:

–

Address bit (MSB)

–

Idle line

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Muting function for multiprocessor configurations

●

Overrun, noise and frame error detection

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Six interrupt sources

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Tx, Rx parity control

5.9.3

SPI

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Maximum speed: 10 Mbit/s or fCPU/2 both for master and slave

●

Full duplex synchronous transfers

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Simplex synchronous transfers on two lines with a possible bidirectional data line

●

Master or slave operation - selectable by hardware or software

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CRC calculation

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1 byte Tx and Rx buffer

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Slave/master selection input pin

STM8AP5X2ATAY 数据表(PDF) 22 Page - STMicroelectronics

STM8AP5X2ATAY 数据表(HTML) 22 Page - STMicroelectronics

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