STM8AP5X2ATAY datasheet(23/100 Pages) STMICROELECTRONICS

23 / 100 page

STM8AF61xx, STM8AF51xx

Product overview

23/100

5.9.4

I2C

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I2C master features:

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Clock generation

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Start and stop generation

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I2C slave features:

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Programmable I2C address detection

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Stop bit detection

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Generation and detection of 7-bit/10-bit addressing and general call

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Supports different communication speeds:

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Standard speed (up to 100 kHz),

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Fast speed (up to 400 kHz)

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Interrupt:

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Successful address/data communication

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Error condition

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Wake-up from halt

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Wake-up from halt on address detection in slave mode

5.9.5

CAN

The beCAN3 controller (basic enhanced CAN), interfaces the CAN network and supports

the CAN protocol version 2.0A and B. It has been designed to manage a high number of

incoming messages efficiently with a minimum CPU load.

For safety-critical applications, the CAN controller provides all hardware functions to support

the CAN time triggered communication option (TTCAN).

The maximum transmission speed is 1 Mbit.

Transmission

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Three transmit mailboxes

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Configurable transmit priority by identifier or order request

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Time stamp on SOF transmission

Reception

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11- and 29-bit ID

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1 receive FIFO (3 messages deep)

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Software-efficient mailbox mapping at a unique address space

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FMI (filter match index) stored with message

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Configurable FIFO overrun

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Time stamp on SOF reception

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6 filter banks, 2 x 32 bytes (scalable to 4 x 16-bit) each, enabling various masking

configurations, such as 12 filters for 29-bit ID or 48 filters for 11-bit ID

STM8AP5X2ATAY 数据表(PDF) 23 Page - STMicroelectronics

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