AT89C51ED2-RDTUM datasheet(21/137 Pages) ATMEL

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4235K–8051–05/08

AT89C51RD2/ED2

Dual Data Pointer Register (DPTR)

The additional data pointer can be used to speed up code execution and reduce code size.

The dual DPTR structure is a way by which the chip will specify the address of an external data

memory location. There are two 16-bit DPTR registers that address the external memory, and a

single bit called DPS = AUXR1.0 (see Table 8-1) that allows the program code to switch

between them (Refer to Figure 8-1).

Figure 8-1.

Use of Dual Pointer

Table 8-1.

AUXR1 Register

AUXR1- Auxiliary Register 1(0A2h)

External Data Memory

AUXR1(A2H)

DPS

DPH(83H) DPL(82H)

DPTR0

DPTR1

ENBOOT

GF3

DPS

Bit

Number

Bit

Mnemonic

Description

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

ENBOOT

Enable Boot Flash

Cleared to disable boot ROM.

Set to map the boot ROM between F800h - 0FFFFh.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

GF3

This bit is a general-purpose user flag.(1)

Always cleared

Reserved

The value read from this bit is indeterminate. Do not set this bit.

DPS

Data Pointer Selection

Cleared to select DPTR0.

Set to select DPTR1.

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