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AT89C51ED2-RDTUM 数据表(PDF) 59 Page - ATMEL Corporation |
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AT89C51ED2-RDTUM 数据表(HTML) 59 Page - ATMEL Corporation |
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59 / 137 page ![]() 59 4235K–8051–05/08 AT89C51RD2/ED2 15. Keyboard Interface The AT89C51RD2/ED2 implements a keyboard interface allowing the connection of a 8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on both high or low level. These inputs are available as alternate function of P1 and allow to exit from idle and power-down modes. The keyboard interfaces with the C51 core through 3 special function registers: KBLS, the Key- board Level Selection register (Table 15-3), KBE, the Keyboard interrupt Enable register (Table 15-2), and KBF, the Keyboard Flag register (Table 15-1). 15.0.1 Interrupt The keyboard inputs are considered as 8 independent interrupt sources sharing the same inter- rupt vector. An interrupt enable bit (KBD in IE1) allows global enable or disable of the keyboard interrupt (see Figure 15-1). As detailed in Figure 15-2 each keyboard input has the capability to detect a programmable level according to KBLS. x bit value. Level detection is then reported in interrupt flags KBF.x that can be masked by software using KBE. x bits. This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allows usage of P1 inputs for other purpose. Figure 15-1. Keyboard Interface Block Diagram Figure 15-2. Keyboard Input Circuitry 15.0.2 Power Reduction Mode P1 inputs allow exit from idle and power-down modes as detailed in Section “Power Manage- ment”, page 80. P1:x KBE.x KBF.x KBLS.x 0 1 Vcc Internal Pullup P1.0 Keyboard Interface Interrupt Request KBD IE1 Input Circuitry P1.1 Input Circuitry P1.2 Input Circuitry P1.3 Input Circuitry P1.4 Input Circuitry P1.5 Input Circuitry P1.6 Input Circuitry P1.7 Input Circuitry KBDIT |
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