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AT89C51ED2-RDTUM 数据表(PDF) 29 Page - ATMEL Corporation |
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AT89C51ED2-RDTUM 数据表(HTML) 29 Page - ATMEL Corporation |
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29 / 137 page ![]() 29 4235K–8051–05/08 AT89C51RD2/ED2 Figure 11-2. Power Fail Detect When the power is applied, the Power Monitor immediately asserts a reset. Once the internal supply after the voltage regulator reach a safety level, the power monitor then looks at the XTAL clock input. The internal reset will remain asserted until the Xtal1 levels are above and below VIH and VIL. Further more. An internal counter will count 1024 clock periods before the reset is de-asserted. If the internal power supply falls below a safety level, a reset is immediately asserted. . Vcc t Reset Vcc VPFDP VPFDM |
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