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9202 数据表(PDF) 73 Page - STMicroelectronics |
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9202 数据表(HTML) 73 Page - STMicroelectronics |
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73 / 175 page ![]() 73/175 UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV PULSE WIDTH MODULATION (PWM) The PWM block has the following features: s Four-channel, 8-bit PWM unit with 16-bit prescaler s One-channel, 8-bit unit with programmable frequency and pulse width s PWM Output with programmable polarity 4-channel PWM Unit (PWM 0-3) The 8-bit counter of a PWM counts module 256 (i.e., from 0 to 255, inclusive). The value held in the 8-bit counter is compared to the contents of the Special Function Register (PWM 0-3) of the corre- sponding PWM. The polarity of the PWM outputs is programmable and selected by the PWML Bit in PWMCON register. Provided the contents of a PWM 0-3 register is greater than the counter val- ue, the corresponding PWM output is set HIGH (with PWML = 0). When the contents of this regis- ter is less than or equal to the counter value, the corresponding PWM output is set LOW (with PWML = 0). The pulse-width-ratio is therefore de- fined by the contents of the corresponding Special Function Register (PWM 0-3) of a PWM. By load- ing the corresponding Special Function Register (PWM 0-3) with either 00H or FFH, the PWM out- put can be retained at a constant HIGH or LOW level respectively (with PWML = 0). For each PWM unit, there is a 16-bit Prescaler that are used to divide the main system clock to form the input clock for the corresponding PWM unit. This prescaler is used to define the desired repeti- tion rate for the PWM unit. SFR registers B1h - B2h are used to hold the 16-bit divisor values. The repetition frequency of the PWM output is giv- en by: fPWM8 = (fOSC / prescaler0) / (2 x 256) And the input clock frequency to the PWM counters is = fOSC / 2 / (prescaler data value + 1) See the I/O PORTS (MCU Module), page 47 for more information on how to configure the Port 4 pin as PWM output. |
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