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数据搜索系统，热门电子元器件搜索 |
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9202 数据表(PDF) 76 Page - STMicroelectronics |
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9202 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 175 page  UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV 76/175 Programmable Period 8-bit PWM The PWM 4 channel can be programmed to pro- vide a PWM output with variable pulse width and period. The PWM 4 has a 16-bit Prescaler, an 8- bit Counter, a Pulse Width Register, and a Period Register. The Pulse Width Register defines the PWM pulse width time, while the Period Register defines the period of the PWM. The input clock to the Prescaler is fOSC/2. The PWM 4 channel is as- signed to Port 4.7. Figure 37. Programmable PWM 4 Channel Block Diagram AI07091 Port 4.7 16-bit Prescaler Register (B4h, B3h) 16-bit Prescaler Counter 8-bit Counter 8-bit PWM4P Register (Period) 8-bit PWM4 Comparator Register 8-bit PWM4 Comparator PWM4 Control Match CPU RD/WR Load Load Clock Reset PWMCON Bit 6 (PWMP) DATA BUS CPU RD/WR fOSC / 2 PWMCON Bit 5 (PWME) 8 16 8 8 8 8 8-bit PWM4W Register (Width) 8-bit PWM4 Comparator Register 8-bit PWM4 Comparator 8 88 8 8 |
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