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A14100A-RQ208C 数据表(PDF) 67 Page - Actel Corporation

部件名 A14100A-RQ208C
功能描述  Accelerator Series FPGAs - ACT 3Family
PDF  68 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ACTEL [Actel Corporation]
网页  http://www.actel.com
标志 ACTEL - Actel Corporation

A14100A-RQ208C 数据表(HTML) 67 Page - Actel Corporation

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Accelerator Series FPGAs – ACT ™ 3 Family
Package Pin Assignments (continued)
207-Pin CPGA (Top View)
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
T
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
T
207-Pin
CPGA
A1460 Function
Location
CLKA or I/O
K1
CLKB or I/O
J3
DCLK or I/O
E4
GND
C15, D4, D5, D9, D14, J4, J14, P3, P4, P7, P9, P14, R15
HCKL or I/O
J15
IOCLK or I/O
P5
IOPCL or I/O
N14
MODE
D7
NC
A1, A2, A16, A17, B1, B17, C1, C2, S1, S3, S17, T1, T2, T16, T17
PRA OR I/O
H1
PRB or I/O
K16
SDI or I/O
C3
VCC
B2, B9, B16, D11, J2, J16, P12, S2, S9, S16, T5
Notes:
1.
Unused I/O pins are designated as outputs by ALS and are driven low.
2.
All unassigned pins are available for use as I/Os.
3.
MODE should be terminated to GND through a 10K resistor to enable Actionprobe usage; otherwise it can be terminated directly to GND.



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