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HC331 数据表(PDF) 10 Page - Altera Corporation

部件名 HC331
功能描述  HardCopy III Device
PDF  26 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

HC331 数据表(HTML) 10 Page - Altera Corporation

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1–8
Chapter 1: DC and Switching Characteristics of HardCopy III Devices
Electrical Characteristics
HardCopy III Device Handbook, Volume 3
© December 2008
Altera Corporation
Internal Weak Pull-Up Resistor
Table 1–11 lists the weak pull-up resistor values for HardCopy III devices.
I/O Standard Specifications
Table 1–12 through Table 1–17 list input voltage sensitivities (V
IH and VIL), output
voltage (V
OH and VOL), and current drive characteristics (IOH and IOL) for all I/O
standards supported by HardCopy III devices. Refer to Table 1–33 on page 1–21 for an
explanation of terms used in Table 1–12 through Table 1–17. V
OL and VOH values are
valid at the corresponding I
OL and IOH, respectively.
Table 1–11. HardCopy III Internal Weak Pull-Up Resistor – Preliminary (Note 1), (2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
R
PU
Value of I/O pin pull-up resistor
before and during user mode, if the
pull-up resistor option is enabled
V
CCIO = 3.0 V ± 5% (3)
—25
—
k
Ω
V
CCIO = 2.5 V ± 5% (3)
—25
—
k
Ω
V
CCIO = 1.8 V ± 5% (3)
—25
—
k
Ω
V
CCIO = 1.5 V ± 5% (3)
—25
—
k
Ω
V
CCIO = 1.2 V ± 5% (3)
—25
—
k
Ω
Notes to Table 1–11:
(1) Pending silicon characterization.
(2) All I/O pins have an option to enable weak pull-up except test and JTAG pins.
(3) Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO.
Table 1–12. Single-Ended I/O Standards Specifications — Preliminary
I/O Standard
V
CC IO (V)
V
IL (V)
V
IH (V)
V
OL (V)
V
OH (V)
I
OL (mA)
I
OH (mA)
Min
Typ
Max
Min
Max
Min
Max
Max
Min
3.0-V LVTTL
2.85
3
3.15
–0.3
0.8
1.7
3.6
0.4
2.4
2
–2
3.0-V
LVCMOS
2.85
3
3.15
–0.3
0.8
1.7
3.6
0.2
V
CC IO –
0.2
0.1
–0.1
2.5V LVTTL/
LVCMOS
2.375
2.5
2.625
–0.3
0.7
1.7
3.6
0.2
2.1
0.1
–0.1
2.5
2.625
–0.3
0.7
1.7
3.6
0.4
2
1
–1
2.5
2.625
–0.3
0.7
1.7
3.6
0.7
1.7
2
–2
1.8V LVTTL/
LVCMOS
1.71
1.8
1.89
–0.3
0.35 ×
V
CCIO
0.65 ×
V
CC IO
V
CCIO +
0.3
0.45
V
CC IO –
0.45
2–2
1.5 V LVTTL/
LVCMOS
1.425
1.5
1.575
–0.3
0.35 ×
V
CCIO
0.65 ×
V
CC IO
V
CCIO +
0.3
0.25 ×
V
CCIO
0.75 ×
V
CC IO
2–2
1.2V LVTTL/
LVCMOS
1.14
1.2
1.26
–0.3
0.35 ×
V
CCIO
0.65 ×
V
CC IO
V
CCIO +
0.3
0.25 ×
V
CCIO
0.75 ×
V
CC IO
2–2
3.0-V PCI
2.85
3
3.15
—
0.3 ×
V
CCIO
0.5 ×
V
CC IO
3.6
0.1 ×
V
CCIO
0.9 ×
V
CC IO
1.5
–0.5
3.0-V PCI-X
2.85
3
3.15
—
0.35 ×
V
CCIO
0.5 ×
V
CC IO
—
0.1 ×
V
CCIO
0.9 ×
V
CC IO
1.5
–0.5



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