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MPC8379ECVRALDA 数据表(PDF) 60 Page - Freescale Semiconductor, Inc |
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MPC8379ECVRALDA 数据表(HTML) 60 Page - Freescale Semiconductor, Inc |
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60 / 114 page ![]() MPC8379E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2 60 Freescale Semiconductor Serial ATA (SATA) 15.2.1 Gen1i/1.5G Transmitter Specifications Table 51 provides the DC differential transmitter output DC characteristics for the SATA interface at Gen1i or 1.5 Gbits/s transmission. Table 52 provides the differential transmitter output AC characteristics for the SATA interface at Gen1i or 1.5 Gbits/s transmission. 15.2.2 Gen2i/3G Transmitter Specifications Table 53 provides the differential transmitter output DC characteristics for the SATA interface at Gen2i or 3.0 Gbits/s transmission. Table 51. Gen1i/1.5G Transmitter (Tx) DC Specifications Parameter Symbol Min Typical Max Units Notes Tx differential output voltage VSATA_TXDIFF 400 500 600 mVp-p 1 Tx differential pair impedance ZSATA_TXDIFFIM 85 100 115 Ω — Note: 1 Terminated by 50 Ω load. Table 52. Gen1i/1.5G Transmitter AC Specifications Parameter Symbol Min Typical Max Units Notes Channel speed tCH_SPEED — 1.5 — Gbps — Unit interval TUI 666.4333 666.667 670.2333 ps — Total jitter, data-data 5UI USATA_TXTJ5UI — — 0.355 UIp-p 1 Total jitter, data-data 250 UI USATA_TXTJ250UI — — 0.47 UIp-p 1 Deterministic jitter, data-data 5UI USATA_TXDJ5UI — — 0.175 UIp-p 1 Deterministic jitter, data-data 250 UI USATA_TXDJ250UI — — 0.22 UIp-p 1 Note: 1 Measured at Tx output pins peak to peak phase variation, random data pattern. Table 53. Gen 2i/3G Transmitter DC Specifications Parameter Symbol Min Typical Max Units Notes Tx differential output voltage VSATA_TXDIFF 400 550 700 mVp-p 1 Tx differential pair impedance ZSATA_TXDIFFIM 85 100 115 Ω — Note: 1 Terminated by 50 Ω load. |
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