MPC8379ECVRALDA datasheet(69/114 Pages) FREESCALE

69 / 114 page

MPC8379E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

High-Speed Serial Interfaces (HSSI)

Figure 48. Differential Voltage Definitions for Transmitter or Receiver

To illustrate these definitions using real values, consider the case of a CML (Current Mode Logic)

transmitter that has a common mode voltage of 2.25 V and each of its outputs, TD and TD, has a swing

that goes between 2.5 V and 2.0 V. Using these values, the peak-to-peak voltage swing of each signal (TD

or TD) is 500 mVp-p, which is referred as the single-ended swing for each signal. In this example, since

the differential signaling environment is fully symmetrical, the transmitter output’s differential swing

(VOD) has the same amplitude as each signal’s single-ended swing. The differential output signal ranges

between 500 mV and –500 mV, in other words, VOD is 500 mV in one phase and –500 mV in the other

phase. The peak differential voltage (VDIFFp) is 500 mV. The peak-to-peak differential voltage (VDIFFp-p)

is 1000 mVp-p.

20.2

SerDes Reference Clocks

The SerDes reference clock inputs are applied to an internal PLL whose output creates the clock used by

the corresponding SerDes lanes. The SerDes reference clocks inputs are SD1_REF_CLK and

SD1_REF_CLK for both lanes of SerDes1, and SD2_REF_CLK and SD2_REF_CLK for both lanes of

SerDes2.

The following sections describe the SerDes reference clock requirements and some application

information.

20.2.1

SerDes Reference Clock Receiver Characteristics

Figure 49 shows a receiver reference diagram of the SerDes reference clocks.

•

SerDes Reference Clock Receiver Reference Circuit Structure

—The SDn_REF_CLK and SDn_REF_CLK are internally AC-coupled differential inputs as

shown in Figure 49. Each differential clock input (SDn_REF_CLK or SDn_REF_CLK) has a

Ω termination to SGND_SRDSn (xcorevss) followed by on-chip AC-coupling.

— The external reference clock driver must be able to drive this termination.

Differential Swing, VID or VOD = A – B

A Volts

B Volts

n_TX or

n_RX

n_TX or

n_RX

Differential Peak Voltage, VDIFFp = |A – B|

Differential Peak-Peak Voltage, VDIFFpp = 2

× VDIFFp (not shown)

Vcm = (A + B)/2

MPC8379ECVRALDA 数据表(PDF) 69 Page - Freescale Semiconductor, Inc

MPC8379ECVRALDA 数据表(HTML) 69 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载