ADE7858ACPZ-REF datasheet(22/76 Pages) AD

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ADE7858

Preliminary Technical Data

Rev. PrA| Page 22 of 76

As previously stated, the serial ports of the ADE7858 work on

32, 16 or 8-bit words. When IAWV, IBWV, ICWV 24-bit signed

registers are read from the ADE7858, they are transmitted

signed extended to 32 bits. See Figure 18 for details.

24 bit signed number

bit 23 is sign bit

bits 31-24 equal to

bit 23

Figure 18. 24-bit IxWV (x=A, B, C) are transmitted as 32-bit

signed words

The ADE7858 contains a High Speed Data Capture (HSDC)

port that is specially designed to provide fast access to the

waveform sample registers. See HSDC Interface section for

more details.

di/dt CURENT SENSOR AND DIGITAL INTEGRATOR

The di/dt sensor detects changes in the magnetic field caused by

the ac current. Figure 19 shows the principle of a di/dt current

sensor.

MAGNETIC FIELD CREATED BY CURRENT

(DIRECTLY PROPORTIONAL TO CURRENT)

+ EMF (ELECTROMOTIVE FORCE)

– INDUCED BY CHANGES IN

MAGNETIC FLUX DENSITY (di/dt)

Figure 19. Principle of a di/dt Current Sensor

The flux density of a magnetic field induced by a current is

directly proportional to the magnitude of the current. The

changes in the magnetic flux density passing through a conductor

loop generate an electromotive force (EMF) between the two

ends of the loop. The EMF is a voltage signal that is propor-

tional to the di/dt of the current. The voltage output from the

di/dt current sensor is determined by the mutual inductance

between the current carrying conductor and the di/dt sensor.

Due to the di/dt sensor, the current signal needs to be filtered

before it can be used for power measurement. On each phase

currents data paths, there is a built-in digital integrator to

recover the current signal from the di/dt sensor. The digital

integrator is disabled by default when the ADE7858 is powered

up and after reset. Setting bit 0 (INTEN) of the CONFIG[15:0]

magnitude and phase response of the digital integrator.

Note that the integrator has a −20 dB/dec attenuation and

approximately −90° phase shift. When combined with a di/dt

sensor, the resulting magnitude and phase response should be a

flat gain over the frequency band of interest. However, the di/dt

sensor has a 20 dB/dec gain associated with it and generates

significant high frequency noise. An antialiasing filter of at least

the second order is needed to avoid that the noise alias back in

the band of interest when the ADC is sampling (see the

Antialiasing Filter section).

Figure 20. Combined Gain and Phase Response of the

Digital Integrator

DICOEFF[23:0] 24-bit signed register is used in the digital

integrator algorithm. At power up or after a reset, its value is

0x000000. Before turning on the integrator, this register must be

initialized with 0xFF8000. DICOEFF[23:0] is not used when

the integrator is turned off and can be left at 0x000000 in this

case.

–30

–15

–20

–25

–89.96

–89.97

–89.98

–89.99

FREQUENCY (Hz)

Figure 21. Combined Gain and Phase Response of the

Digital Integrator (40 Hz to 70 Hz)

As previously stated, the serial ports of the ADE7858 work on

32, 16 or 8-bit words. Similar to the registers presented in

Figure 15, DICOEFF[23:0] 24-bit signed register is accessed as a

32-bit register with 4 most significant bits padded with 0s and

sign extended to 28 bits.

When the digital integrator is switched off, the ADE7858 can

be used directly with a conventional current sensor, such as a

current transformer (CT).

VOLTAGE CHANNEL ADC

Figure 22 shows the ADC and signal processing chain for the

input VA in the voltage channel. The VB and VC channels have

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