ADE7858ACPZ-REF datasheet(26/76 Pages) AD

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ADE7858

Preliminary Technical Data

Rev. PrA| Page 26 of 76

Phase A

Phase B

Phase C

ZX A

ZX B

ZX C

Figure 27. Phase Sequence Detection

When ANGLESEL[1:0] bits are set to 00, the default value, then

the delays between voltages and currents on the same phase are

measured. The delay between phase A voltage and phase A

current is stored in the 16-bit unsigned ANGLE0[15:0] register

(See Figure 28 for details). In a similar way, the delays between

voltages and currents on phase B and C are stored in

ANGLE1[15:0] and ANGLE2[15:0] registers respectively.

Phase A

Voltage

Phase A

Current

ANGLE0

Figure 28.Delay between phase A voltage and current is stored in

ANGLE0[15:0]

When ANGLESEL[1:0] bits are set to 01, the delays between

phase voltages are measured. The delay between phase A

voltage and phase C voltage is stored into ANGLE0[15:0]. The

delay between phase B voltage and phase C voltage is stored in

ANGLE1[15:0] register and the delay between phase A voltage

and phase B voltage is stored into ANGLE2[15:0] register (see

Figure 29 for details).

When ANGLESEL[1:0] bits are set to 10, the delays between

phase currents are measured. Similar to delays between phase

voltages, the delay between phase A and phase C currents is

stored into ANGLE0[15:0] register, the delay between phase B

and phase C currents is stored into ANGLE1[15:0] register and

the delay between phase A and phase B currents is stored into

ANGLE2[15:0] register (see Figure 29 for details).

The ANGLE0, ANGLE1 and ANGLE2 registers are 16-bit

unsigned registers with 1LSB corresponding to 3.90625μs (256

KHz clock), which means a resolution of 0.07° (360°x

50Hz/256KHz) for 50Hz systems and 0.084° (360°x

60Hz/256KHz) for 60Hz systems. The delays between phase

voltages or phase currents are used to characterize how

balanced the load is. The delays between phase voltages and

currents are used to compute the power factor on each phase

(see expression (5) below).





















KHz

ANGLEx

Line

256

360

cos



(5)

where x=A, B or C and fLine is 50Hz or 60Hz.

Phase A

Phase B

Phase C

ANGLE0

ANGLE2

ANGLE1

Figure 29. Delays between phase voltages (currents)

Period Measurement

The ADE7858 provides the period measurement of the line in

the voltage channel. Bits 1, 0 (PERSEL[1:0]) in MMODE[7:0]

PERIOD register is a 16-bit unsigned register and is updated

every line period. Because of LPF1 filter (see Figure 24), a

settling time of 30-40msec is associated with this filter before

the measurement is stable.

The period measurement has a resolution of 3.90625 s/LSB

(256 KHz clock), which represents 0.0195% (50Hz/256KHz)

when the line frequency is 50 Hz and 0.0234% (60Hz/256KHz)

when the line frequency is 60Hz. The value of the period

(256KHz/50Hz) and for 60Hz networks is approximately 4267

(256KHz/60Hz). The length of the register enables the

measurement of line frequencies as low as 3.9 Hz (256KHz/216).

The period register is stable at ±1 LSB when the line is

established and the measurement does not change.

The following expressions may be used to compute the line

period and frequency using PERIOD[15:0] register:

[sec]

256

]

[

PERIOD

TL 

(6)

]

[

]

[

256

PERIOD

f L 

(7)

Phase Voltage Sag Detection

The ADE7858 can be programmed to detect when the absolute

value of any phase voltage drops below a certain peak value for

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