TUSB1310

SLLSE16C – DECEMBER 2009 – REVISED AUGUST 2010

www.ti.com

Contents

1

PRODUCT OVERVIEW

......................................................................................................... 7

1.1

Features

...................................................................................................................... 7

1.2

Target Applications

......................................................................................................... 7

1.3

Introduction

.................................................................................................................. 8

1.4

Functional Block Diagram

.................................................................................................. 8

2

PIN DESCRIPTIONS

........................................................................................................... 10

2.1

Configuration Pins

......................................................................................................... 10

2.2

PIPE

......................................................................................................................... 10

2.3

ULPI

......................................................................................................................... 13

2.3.1

ULPI Modes

..................................................................................................... 13

2.4

Clocking

..................................................................................................................... 14

2.5

JTAG Interface

............................................................................................................. 14

2.6

Reset and Output Control Interface

..................................................................................... 14

2.7

Strap Options

.............................................................................................................. 14

2.8

USB Interfaces

............................................................................................................. 15

2.9

Special Connect

........................................................................................................... 15

2.10

Power and Ground

........................................................................................................ 15

3

FUNCTIONAL DESCRIPTION

............................................................................................... 17

3.1

Power On and Reset

...................................................................................................... 17

3.1.1

RESETN and PHY_RESETN – Hardware Reset

.......................................................... 17

3.1.2

ULPI Reset – Software Reset

................................................................................. 17

3.1.3

OUT_ENABLE - Output Enable

.............................................................................. 17

3.1.4

Power Up Sequence

........................................................................................... 17

3.2

Clocks

....................................................................................................................... 18

3.2.1

Clock Distribution

............................................................................................... 18

3.2.2

Output Clock

.................................................................................................... 18

3.3

Power Management

....................................................................................................... 18

3.3.1

USB Power Management

...................................................................................... 19

3.4

Receiver Status

............................................................................................................ 19

3.4.1

Clock Tolerance Compensation

.............................................................................. 20

3.4.2

Receiver Detection

............................................................................................. 20

3.4.3

8b/10b Decode Errors

.......................................................................................... 20

3.4.4

Elastic Buffer Errors

............................................................................................ 21

3.4.5

Disparity Errors

................................................................................................. 21

3.5

Loopback

................................................................................................................... 21

4

REGISTERS

...................................................................................................................... 22

4.1

Register Definitions

........................................................................................................ 22

4.2

Register Map

............................................................................................................... 22

4.2.1

Vendor ID and Product ID (00h-03h)

........................................................................ 22

4.2.2

Function Control (04h-06h)

.................................................................................... 23

4.2.3

Interface Control (07h-09h)

.................................................................................... 24

4.2.4

Debug (15h)

..................................................................................................... 24

4.2.5

Scratch Register (16-18h)

..................................................................................... 24

5

DESIGN GUIDELINES

......................................................................................................... 25

5.1

Chip Connection on PCB

................................................................................................. 25

5.1.1

USB Connector Pins Connection

............................................................................. 25

2

Contents

Copyright © 2009–2010, Texas Instruments Incorporated