TUSB1310

SLLSE16C – DECEMBER 2009 – REVISED AUGUST 2010

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4

REGISTERS

4.1

Register Definitions

Table 4-1. Register Definitions

ACCESS CODE

EXPANDED NAME

DESCRIPTION

Rd

Read

Register can be read. Read only if this is the only mode given.

Wr

Write

Pattern on the data bus will be written over all bits of the register.

S

Set

Pattern on the data bus is OR'ed with and written into the register.

Pattern on the data bus is a mask. If a bit in the mask is set, then the

C

Clear

corresponding register bit will be set to zero(cleared).

4.2

Register Map

The TUSB1310 contains the ULPI registers consisting of an immediate register set and an extended

register set.

Table 4-2. Register Map

ADDRESS (6 BITS)

REGISTER NAME

Rd

Wr

Set

Clr

IMMEDIATE REGISTER SET

Vendor ID low

00h

Vendor ID high

01h

Product ID low

02h

Product ID high

03h

Function control

04h-06h

04h

05h

06h

Interface control

07h-09h

07h

08h

09h

Reserved

10h – 14h

Debug

15h

Scratch register

16h-18h

16h

17h

18h

Reserved

19h-2Eh

Access extended register set

2Fh

NonSS USB

30h-32h

30h

31h

32h

SS USB

33h-35h

33h

34h

35h

Reserved

36h-3Fh

EXTENDED REGISTER SET

Maps to immediate register set above

00h-3Fh

Reserved

40h-7Fh

Vendor specific

80h-FFh

4.2.1

Vendor ID and Product ID (00h-03h)

Table 4-3. Vendor ID and Product ID

ADDRESS

BITS

NAME

ACCESS

RESET

DESCRIPTION

00h

7:00

Vendor ID low

Rd

51h

Lower byte of vendor ID supplied by USB-IF

01h

7:00

Vendor ID high

Rd

04h

Upper byte of vendor ID supplied by USB-IF

02h

7:00

Product ID low

Rd

10h

Lower byte of vendor ID supplied by vendor

03h

7:00

Product ID high

Rd

13h

Upper byte of vendor ID supplied by vendor

22

REGISTERS

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