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M41T82 数据表(PDF) 18 Page - STMicroelectronics |
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M41T82 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 61 page ![]() Operation M41T82-M41T83 18/61 Doc ID 12578 Rev 12 2.4 Data retention and battery switchover (VSO = VRST) Once VCC falls below the switchover voltage (VSO = VRST), the device automatically switches over to the battery and powers down into an ultra low current mode of operation to preserve battery life. If VBAT is less than, or greater than VRST, the device power is switched from VCC to VBAT when VCC drops below VRST (see Figure 26 on page 50). At this time the clock registers and user RAM will be maintained by the attached battery supply. When it is powered back up, the device switches back from battery to VCC at VSO + hysteresis. When VCC rises above VRST, it will recognize the inputs. For more information on battery storage life refer to Application Note AN1012. 2.5 Power-on reset (trec) The M41T8x continuously monitors VCC. When VCC falls to the power fail detect trip point, the RST output pulls low (open drain) and remains low after power-up for trec (210 ms typical) after VCC rises above VRST (max). Note: The trec period does not affect the RTC operation. Write protect only occurs when VCC is below VRST. When VCC rises above VRST, the RTC will be selectable immediately. Only the RST output is affected by the trec period. The RST pin is an open drain output and an appropriate pull-up resistor to VCC should be chosen to control the rise time. |
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