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M41T82 数据表(PDF) 45 Page - STMicroelectronics |
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M41T82 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 61 page  M41T82-M41T83 Clock operation Doc ID 12578 Rev 12 45/61 3.17 OTP bit operation (M41T83 in SOX18 package only) When the OTP (one time programmable) bit is set to a '1,' the value in the internal OTP registers will be transferred to the analog calibration register (12h) and are “Read only.” The OTP value is programmed by the manufacturer, and will contain the calibration value necessary to achieve ±5 ppm at room temperature after two SMT reflows. This clock accuracy can then be guaranteed to drift no more than ±3 ppm the first year, and ±1 ppm for each following year due to crystal aging. If the OTP bit is set to 0, the analog calibration register will become a WRITE/READ register and function like standard SRAM memory cells, allowing the user to implement any desired value of analog calibration. When the user sets the OTP bit, they need to wait for approximately 8 ms before the analog registers transfer the value from the OTP to the analog registers due to the OTP read operation. |
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