M41T82 datasheet(36/61 Pages) STMICROELECTRONICS

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Clock operation

M41T82-M41T83

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Doc ID 12578 Rev 12

When the timer is in the free-running mode, with a value of n programmed into the timer

countdown value, the output will nominally be low for one cycle of the specified clock source

and high for n-1 cycles with an overal period of n cycles. Thus, the countdown period is

n/source clock frequency.

For the special case of n = 1, as shown in Table 11, when the clock source is 4096 or 64 Hz,

the low time (TL) is half the clock period instead of a full clock period.

Figure 21.

Timer output waveform in free-running mode (with TI/TP = 1)

Table 10.

Timer control register map(1)

Bit positions labeled with 0 should always be written with logic 0.

Addr

Function

0Fh

WDF

AF1

AF2

Flags

10h

Timer countdown value(2)

Writing to the timer register will not reset the TF bit nor clear the interrupt.

Timer value

11h

TI/TP

TIE

TD1

TD0

Timer control

Table 11.

Timer interrupt operation in free-running mode (with TI/TP = 1)

Source clock (Hz)

IRQ low time – TL (seconds)

(1)

IRQ1/FT/OUT is asserted coincident with TF going true.

IRQ period – TIRQ (seconds)

n = 1(2)

n = loaded countdown timer value (0 < n < 255). The timer is stopped when n = 0.

n > 1

n = 1

n > 1

4096

1/8192 = 122 µs 1/4096 = 244 µs

1/4096 = 244 µs

n / 4096

1/128 = 7.8 ms

1/64 = 15.6 ms

n / 64

11/64

1/641

1/60

1/64

1 minute

n minutes

AM03012v1

IRQ1/FT/OUT

TIRQ

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