STM8L101F2P3ATR datasheet(62/81 Pages) STMICROELECTRONICS

62 / 81 page

Electrical parameters

STM8L101xx

62/81

Doc ID 15275 Rev 11

9.3.9

EMC characteristics

Susceptibility tests are performed on a sample basis during product characterization.

Functional EMS (electromagnetic susceptibility)

Based on a simple running application on the product (toggling 2 LEDs through I/O ports),

the product is stressed by two electromagnetic events until a failure occurs (indicated by the

LEDs).

●

ESD: Electrostatic discharge (positive and negative) is applied on all pins of the device

until a functional disturbance occurs. This test conforms with the IEC 61000-4-2

standard.

●

FTB: A burst of fast transient voltage (positive and negative) is applied to VDD and VSS

through a 100 pF capacitor, until a functional disturbance occurs. This test conforms

with the IEC 61000-4-4 standard.

A device reset allows normal operations to be resumed. The test results are given in the

table below based on the EMS levels and classes defined in application note AN1709.

Designing hardened software to avoid noise problems

EMC characterization and optimization are performed at component level with a typical

application environment and simplified MCU software. It should be noted that good EMC

performance is highly dependent on the user application and the software in particular.

Therefore it is recommended that the user applies EMC software optimization and

prequalification tests in relation with the EMC level requested for his application.

Prequalification trials:

Most of the common failures (unexpected reset and program counter corruption) can be

reproduced by manually forcing a low state on the NRST pin or the oscillator pins for 1

second.

To complete these trials, ESD stress can be applied directly on the device, over the range of

specification values. When unexpected behavior is detected, the software can be hardened

to prevent unrecoverable errors occurring (see application note AN1015).

Table 34.

EMS data

Symbol

Parameter

Conditions

Level/

Class

VFESD

Voltage limits to be applied on any I/O pin to

induce a functional disturbance

LQFP32, VDD = 3.3 V

VEFTB

Fast transient voltage burst limits to be

applied through 100 pF on VDD and VSS

pins to induce a functional disturbance

LQFP32, VDD = 3.3 V, fHSI

LQFP32, VDD = 3.3 V, fHSI/2

STM8L101F2P3ATR 数据表(PDF) 62 Page - STMicroelectronics

STM8L101F2P3ATR 数据表(HTML) 62 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表下载