 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
STM8L101F2P3ATR 数据表(PDF) 31 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L101F2P3ATR 数据表(HTML) 31 Page - STMicroelectronics |
|
|
31 / 81 page  STM8L101xx Memory and register map Doc ID 15275 Rev 11 31/81 0x00 7F78 to 0x00 7F79 Reserved area (2 bytes) 0x00 7F80 SWIM SWIM_CSR SWIM control status register 0x00 0x00 7F81 to 0x00 7F8F Reserved area (15 bytes) 0x00 7F90 DM DM_BK1RE Breakpoint 1 register extended byte 0xFF 0x00 7F91 DM_BK1RH Breakpoint 1 register high byte 0xFF 0x00 7F92 DM_BK1RL Breakpoint 1 register low byte 0xFF 0x00 7F93 DM_BK2RE Breakpoint 2 register extended byte 0xFF 0x00 7F94 DM_BK2RH Breakpoint 2 register high byte 0xFF 0x00 7F95 DM_BK2RL Breakpoint 2 register low byte 0xFF 0x00 7F96 DM_CR1 Debug module control register 1 0x00 0x00 7F97 DM_CR2 Debug module control register 2 0x00 0x00 7F98 DM_CSR1 Debug module control/status register 1 0x10 0x00 7F99 DM_CSR2 Debug module control/status register 2 0x00 0x00 7F9A DM_ENFCTR Enable function register 0xFF 1. Refer to Table 7: General hardware register map on page 25 (addresses 0x00 50A0 to 0x00 50A5) for a list of external interrupt registers. Table 8. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block Register label Register name Reset status |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
