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STM8L101F2P3ATR 数据表(PDF) 35 Page - STMicroelectronics |
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STM8L101F2P3ATR 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 81 page  STM8L101xx Option bytes Doc ID 15275 Rev 11 35/81 Caution: After a device reset, read access to the program memory is not guaranteed if address 0x4807 is not programmed to 0x00. OPT3 DATASIZE[7:0] Size of the data EEPROM area 0x00: no data EEPROM area (1) 0x01: 1 page reserved for data storage from 0x9FC0 to 0x9FFF(1) 0x02: 2 pages reserved for data storage from 0x9F80 to 0x9FFF(1) ... (1) 0x20: 32 pages reserved for data storage from 0x9800 to 0x9FFF(1) Refer to Data EEPROM (DATA) section in the STM8L reference manual (RM0013) for more details. OPT4 IWDG_HW: Independent watchdog 0: Independent watchdog activated by software 1: Independent watchdog activated by hardware IWDG_HALT: Independent window watchdog reset on Halt/Active-halt 0: Independent watchdog continues running in Halt/Active-halt mode 1: Independent watchdog stopped in Halt/Active-halt mode 1. 0x00 is the only allowed value for 4 Kbyte STM8L101xx devices. Table 11. Option byte description (continued) |
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