MPC5601DXLL datasheet(23/77 Pages) FREESCALE

23 / 77 page

Electrical characteristics

MPC5602D Microcontroller Data Sheet, Rev. 3.1

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

NOTE

SRAM data retention is guaranteed with VDD_LV not below 1.08 V.

Table 9. Recommended operating conditions (5.0 V)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

VSS

SR — Digital ground on VSS_HV pins

—

VDD

SR — Voltage on VDD_HV pins with respect to ground

(VSS)

—4.5

5.5

Voltage drop2

3.0

5.5

VSS_LV

SR — Voltage on VSS_LV (low voltage digital supply) pins

with respect to ground (VSS)

—VSS  0.1 VSS +0.1

VDD_BV

SR — Voltage on VDD_BV pin (regulator supply) with

respect to ground (VSS)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to VDD VDD  0.1 VDD +0.1

VSS_ADC SR — Voltage on VSS_HV_ADC (ADC reference) pin with

respect to ground (VSS

—VSS  0.1 VSS +0.1

VDD_ADC

5 SR — Voltage on VDD_HV_ADC pin (ADC reference) with

respect to ground (VSS)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to VDD VDD  0.1 VDD +0.1

VIN

SR — Voltage on any GPIO pin with respect to ground

(VSS)

—VSS  0.1

—

Relative to VDD

—VDD +0.1

IINJPAD

SR — Injected input current on any pin during overload

condition

—

55

IINJSUM

SR — Absolute sum of all injected input currents during

overload condition

—

50

TVDD

SR — VDD slope to ensure correct power up

—

TBD

0.25

V/µs

SR — Ambient temperature under bias

fCPU  48 MHz

40

125

°C

SR — Junction temperature under bias

—

40

150

1 100 nF capacitance needs to be provided between each V

DD/VSS pair.

2 Full device operation is guaranteed by design when the voltage drops below 4.5 V down to 3.6 V. However, certain

analog electrical characteristics will not be guaranteed to stay within the stated limits.

3 330 nF capacitance needs to be provided between each V

DD_LV/VSS_LV supply pair.

4 470 nF capacitance needs to be provided between V

DD_BV and the nearest VSS_LV (higher value may be needed

depending on external regulator characteristics).

5 100 nF capacitance needs to be provided between V

DD_ADC/VSS_ADC pair.

6 Guaranteed by device validation

MPC5601DXLL 数据表(PDF) 23 Page - Freescale Semiconductor, Inc

MPC5601DXLL 数据表(HTML) 23 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

数据表下载

链接网址

MPC5601DXLL 数据表(PDF) 23 Page - Freescale Semiconductor, Inc

MPC5601DXLL 数据表(HTML) 23 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

数据表 下载

链接网址

数据表下载