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MPC5601DXLL 数据表(PDF) 17 Page - Freescale Semiconductor, Inc |
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MPC5601DXLL 数据表(HTML) 17 Page - Freescale Semiconductor, Inc |
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17 / 77 page  Package pinouts and signal descriptions MPC5602D Microcontroller Data Sheet, Rev. 3.1 Preliminary—Subject to Change Without Notice Freescale Semiconductor 17 PD[12] PCR[60] AF0 AF1 AF2 AF3 — GPIO[60] CS5_0 E0UC[24] — ADC1_S[8] SIUL DSPI_0 eMIOS_0 — ADC I/O O I/O — I J Tristate — 60 PD[13] PCR[61] AF0 AF1 AF2 AF3 — GPIO[61] CS0_1 E0UC[25] — ADC1_S[9] SIUL DSPI_1 eMIOS_0 — ADC I/O I/O I/O — I J Tristate — 62 PD[14] PCR[62] AF0 AF1 AF2 AF3 — GPIO[62] CS1_1 E0UC[26] — ADC1_S[10] SIUL DSPI_1 eMIOS_0 — ADC I/O O I/O — I J Tristate — 64 PD[15] PCR[63] AF0 AF1 AF2 AF3 — GPIO[63] CS2_1 E0UC[27] — ADC1_S[11] SIUL DSPI_1 eMIOS_0 — ADC I/O O I/O — I J Tristate — 66 Port E PE[0] PCR[64] AF0 AF1 AF2 AF3 — GPIO[64] E0UC[16] — — WKUP[6]3 SIUL eMIOS_0 — — WKPU I/O I/O — — I S Tristate — 6 PE[1] PCR[65] AF0 AF1 AF2 AF3 GPIO[65] E0UC[17] — — SIUL eMIOS_0 — — I/O I/O — — M Tristate — 8 PE[2] PCR[66] AF0 AF1 AF2 AF3 — — GPIO[66] E0UC[18] — — EIRQ[21] SIN_1 SIUL eMIOS_0 — — SIUL DSPI_1 I/O I/O — — I I M Tristate — 89 PE[3] PCR[67] AF0 AF1 AF2 AF3 GPIO[67] E0UC[19] SOUT_1 — SIUL eMIOS_0 DSPI_1 — I/O I/O O — M Tristate — 90 PE[4] PCR[68] AF0 AF1 AF2 AF3 — GPIO[68] E0UC[20] SCK_1 — EIRQ[9] SIUL eMIOS_0 DSPI_1 — SIUL I/O I/O I/O — I M Tristate — 93 Table 3. Functional port pin descriptions (continued) Port pin PCR register Alternate function1 Function Peripheral I/O direction2 Pad type RESET config. Pin No. 64 LQFP 100 LQFP |
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