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LSM303DLM 数据表(PDF) 19 Page - STMicroelectronics

部件名 LSM303DLM
功能描述  Sensor module:3-axis accelerometer and 3-axis magnetometer
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LSM303DLM 数据表(HTML) 19 Page - STMicroelectronics

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LSM303DLM
Digital interfaces
Doc ID 018725 Rev 1
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7.1.2
Linear acceleration digital interface
For linear acceleration, the default (factory) 7-bit slave address is 001100xb. The SDO/SA0
pad can be used to modify the least significant bit of the device address. If the SA0 pad is
connected to voltage supply, the LSB is ‘1’ (address 0011001b) otherwise, if the SA0 pad is
connected to ground, the LSB value is ‘0’ (address 0011000b). This solution permits
connecting and addressing two different accelerometers to the same I2C lines.
The slave address is completed with a read/write bit. If the bit is ‘1’ (read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write),
the master transmits to the slave with the direction unchanged.
Table 12 explains how the
SAD+read/write bit pattern is composed, listing all the possible configurations.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the
address of the first register to be read.
In the presented communication format, MAK is master acknowledge and NMAK is no
master acknowledge.
7.1.3
Magnetic field digital interface
For magnetic sensors the default (factory) 7-bit slave address is 0011110xb.
The slave address is completed with a read/write bit. If the bit is ‘1’ (read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (write),
the master transmits to the slave with the direction unchanged.
Table 14 explains how the
SAD is composed.
Table 12.
SAD and read/write patterns
Command
SAD[6:1]
SAD[0] = SA0
R/W
SAD+R/W
Read
001100
0
1
00110001 (31h)
Write
001100
0
0
00110000 (30h)
Read
001100
1
1
00110011 (33h)
Write
001100
1
0
00110010 (32h)
Table 13.
Transfer when master is receiving (reading) multiple bytes of data from slave
Master
ST SAD+W
SUB
SR SAD+R
MAK
MAK
NMAK SP
Slave
SAK
SAK
SAK DATA
DATA
DATA
Table 14.
SAD and read/write patterns
Command
SAD[6:0]
R/W
SAD+R/W
Read
0011110
1
00111101 (3Dh)
Write
0011110
0
00111100 (3Ch)



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