LSM303DLM

Register description

Doc ID 018725 Rev 1

25/38

reason, the content of the trimming registers has changed, it is sufficient to use this bit to

restore the correct values. When the BOOT bit is set to ‘1’ the content of the internal Flash is

copied to the corresponding internal registers and is used to calibrate the device. These

values are factory-trimmed and are different for every accelerometer. They permit good

device behavior and normally do not have to be modified. At the end of the boot process, the

BOOT bit is again set to ‘0’.

is given by:

The equation can be simplified to the following approximated equation:

9.1.3

CTRL_REG3_A (22h)

Table 22.

High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

0

0

Normal mode (reset reading HP_RESET_FILTER)

0

1

Reference signal for filtering

1

0

Normal mode (reset reading HP_RESET_FILTER)

Table 23.

High-pass filter cut-off frequency configuration

HPcoeff2,1

Data rate = 50 Hz

Data rate = 100 Hz

Data rate = 400 Hz

Data rate = 1000 Hz

00

1

2

8

20

01

0.5

1

4

10

10

0.25

0.5

2

5

11

0.125

0.25

1

2.5

f

t

1

1

HPc

------------

–

⎝⎠

⎛⎞

f

s

2

π

------

⋅

ln

=

f

t

f

s

6HPc

⋅

----------------------

=

Table 24.

CTRL_REG3_A register

IHL

PP_OD

LIR2

I2_CFG1

I2_CFG0

LIR1

I1_CFG1

I1_CFG0

Table 25.

CTRL_REG3_A description

IHL

Interrupt active high, low. Default value: 0

(0: active high; 1: active low)

PP_OD

Push-pull/open drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)