AD6622SSLASHPCB datasheet(9/28 Pages) AD

9 / 28 page

AD6622

–9–

REV. 0

PIN FUNCTION DESCRIPTIONS

Pin Number

Name

Type

Description

1, 3–5, 9, 19–21, 31, 32,

GND

Ground Connection

34–36, 38, 39, 42, 52–54,

63–65, 68, 69, 72, 73, 83–85,

95, 96, 98, 99, 102, 103,

105, 115–117, 126, 128

OEN

Active High Output Enable Pin (Actively Pulled Down If Not Connected)

(Not 5 V Tolerant)

27–29, 22–25, 15–18, 10–13, OUT[17:0]

O/T

Wideband Output Data

6–8

14, 26, 41, 47, 122

VDD

+3.0 V Supply (I/O Supply)

59, 66, 78, 90, 104, 110, 127 VDD

+3.0 V Supply (Core Supply)

QOUT

O/T

Indicates Q Output Data (Complex Output Mode)

33, 37, 40, 43–46, 48

D[7:0]

I/O/T

Microprocessor Interface Data

DS (RD)

INM Mode: Read Signal, MNM Mode: Data Strobe Signal

DTACK (RDY)

Acknowledgment of a Completed Transaction (Signals when

µP Port

Is Ready for an Access) Open Drain, Must Be Pulled Up Externally

W (WR)

Read/Write Line (Write Signal)

MODE

Sets Microport Mode: MODE = 1, MNM Mode; MODE = 0, INM Mode

56–58

A[2:0]

Microprocessor Interface Address

Chip Select, Enable the Chip for

µP Access

RESET

Active Low Reset Pin (Actively Pulled Up If Not Connected)

SYNC

SYNC Signal for Synchronizing Multiple AD6622s (Actively Pulled

Down If Not Connected)

CLK

Input Clock (Actively Pulled Down If Not Connected)

QIN

Indicates Q Input Data (Complex Input Mode) (Actively Pulled Down

If Not Connected) (Not 5 V Tolerant)

71, 74–77, 79–82, 86–89,

IN[17:0]

Wideband Input Data (Allows Cascade of Multiple AD6622 Chips In

91–94, 97

a System) (Actively Pulled Down If Not Connected) (Not 5 V Tolerant)

100

TRST

Test Reset Pin (Actively Pulled Up If Not Connected)

101

TCK

Test Clock Input (Actively Pulled Down If Not Connected)

106

TMS

Test Mode Select (Actively Pulled Up If Not Connected)

107

TDO

Test Data Output

108

TDI

Test Data Input (Actively Pulled Down If Not Connected)

109

SCLKA

Serial Clock Output Channel A

111

SDFSA

Serial Data Frame Sync Output Channel A

112

SDINA

Serial Data Input Channel A (Actively Pulled Down If Not Connected)

113

SCLKB

Serial Clock Output Channel B

114

SDFSB

Serial Data Frame Sync Output Channel B

118

SDINB

Serial Data Input Channel B (Actively Pulled Down If Not Connected)

119

SCLKC

Serial Clock Output Channel C

120

SDFSC

Serial Data Frame Sync Output Channel C

121

SDINC

Serial Data Input Channel C (Actively Pulled Down If Not Connected)

123

SCLKD

Serial Clock Output Channel D

124

SDFSD

Serial Data Frame Sync Output Channel D

125

SDIND

Serial Data Input Channel D (Actively Pulled Down If Not Connected)

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