AD6622SSLASHPCB datasheet(16/28 Pages) AD

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AD6622

–16–

REV. 0

NUMERICALLY CONTROLLED OSCILLATOR (NCO) TUNER

Each channel has a fully independent tuner. The tuner accepts

data from the CIC ﬁlter, tunes it to a digital Intermediate Fre-

quency (IF), and passes the result to a shared summation block.

The tuner consists of a 32-bit quadrature NCO and a Quadrature

Amplitude Mixer (QAM). The NCO serves as a local oscillator

and the QAM translates the interpolated channel data from

baseband to the NCO frequency. The worst-case spurious signal

from the NCO is better than –100 dBc for all output frequencies.

The tuner can produce real or complex outputs as requested by

the shared summation block.

In the complex mode, the NCO serves as a quadrature local

oscillator running at fCLK/2, capable of producing any frequency

between –fCLK/4 and +fCLK/4 with a resolution of fCLK/2

(0.0087 Hz for fCLK = 75 MHz).

In the real mode, the NCO serves as a quadrature local oscilla-

tor running at fCLK, capable of producing any frequency between

–fCLK/2 and +fCLK/2 with a resolution of fCLK/2

32 (0.017 Hz for

fCLK = 75 MHz). The quadrature portion of the output is dis-

carded. Negative frequencies are distinguished from positive

frequencies solely by spectral inversion.

The digital IF is calculated using Equation 17 below.

NCO frequency

NCO

=×

232

(17)

where:

NCO_frequency is the value written to 0x02, fIF is the desired

intermediate frequency, and fNCO is fCLK/2 for complex outputs

and fCLK for real outputs.

Phase Dither

The AD6622 provides a phase dither option for improving the

spurious performance of the NCO. Phase dither is enabled by

writing a one to Bit 3 of Channel Register 0x01. When phase

dither is enabled, spurs due to phase truncation in the NCO are

randomized. The choice of whether phase dither is used in a

system will ultimately be decided by the system goals and the

choice of IF frequency. The 18 most signiﬁcant bits of the phase

accumulator are used by the angle to Cartesian conversion. If

the NCO frequency has all zeroes below the 18th bit, then phase

dither has no effect. If the fraction below the 18th bit is near a

1/2 or 1/3, etc., of the 18th bit, then spurs will accumulate sepa-

rated from the IF by 1/2 or 1/3, etc., of the CLK frequency. The

smaller the denominator of this residual fraction, the larger the

spurs due to phase truncation will be. If the phase truncation spurs

are unacceptably high for a given frequency, the phase dither can

reduce these at the penalty of a slight elevation in total error

energy. If the phase truncation spurs are small, phase dither

will not be effective in reducing them further, but a slight eleva-

tion in total error energy will occur.

Amplitude Dither

Amplitude dither can also be used to improve spurious perfor-

mance of the NCO. Amplitude dither is enabled by writing a one

to Bit 4 of Channel Register at 0x01. When enabled, amplitude

dither can reduce spurs due to truncation at the input to the QAM.

If the entire frequency word is close to a fraction that has a

small denominator, the spurs due to amplitude truncation will

be large and amplitude dither will spread these spurs effectively.

Amplitude dither also will increase the total error energy by

approximately 3 dB. For this reason amplitude dither should be

used judiciously.

Phase Offset

The phase offset (Channel Register 0x04) adds an offset to the

phase accumulator of the NCO. This is a 16-bit register that is

interpreted as a 16-bit unsigned integer. Phase offset ranges

from 0 to nearly 2

π radians with a resolution of π/32768 radians.

This register allows multiple NCOs to be synchronized to pro-

duce sine waves with a known phase relationship.

NCO Frequency Update and Phase Offset Update Hold-Off

Counters

The update of both the NCO Frequency and Phase Offset can

be synchronized with internal hold-off counters. Both of these

counters are 16-bit unsigned integers and are clocked at the

master CLK rate. These hold-off counters, used in conjunction

with the frequency or phase offset registers, allow Beam Form-

ing and Frequency Hopping. See the Synchronization section of

this data sheet for additional details. The NCO phase can also

be cleared on Sync (set to 0x0000) by setting Bit 2 of Channel

NCO Output Scale

The output of the NCO can be scaled in four steps of 6 dB each

via Channel Register 0x01, Bits 1–0. Table V is a table of the

control scale. The NCO always has loss to accommodate the

possibility that both the I and Q inputs may reach full-scale simul-

taneously, resulting in a 3 dB input magnitude.

Table V. Control Scale

0x01 Bit 1

0x01 Bit 0

NCO Output Level

–6 dB

–12 dB

–18 dB

–24 dB

PHASE

OFFSET

NCO

FREQUENCY

WORD

ICOS

QSIN

I DATA

FROM CIC5

Q DATA

FROM CIC5

OFF

CLK

PHASE

AMPLITUDE

GEN.

ANGLE TO

CARTESIAN

CONVERSION

Figure 18. NCO Block Diagram

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