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APFCON 数据表(PDF) 112 Page - Microchip Technology

部件名 APFCON
功能描述  Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver
PDF  222 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

APFCON 数据表(HTML) 112 Page - Microchip Technology

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MCP19111
DS22331A-page 112
 2013 Microchip Technology Inc.
REGISTER 19-3:
TRISGPA: PORTGPA TRI-STATE REGISTER
R/W-1
R/W-1
R-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
TRISA<7:6>: PORTGPA Tri-State Control bit
1
= PORTGPA pin configured as an input (tri-stated)
0
= PORTGPA pin configured as an output
bit 5
TRISA5: GPA5 Port Tri-State Control bit
This bit is always ‘1’ as GPA5 is an input only
bit 4-0
TRISA<4:0>: PORTGPA Tri-State Control bit
1
= PORTGPA pin configured as an input (tri-stated)
0
= PORTGPA pin configured as an output
REGISTER 19-4:
WPUGPA: WEAK PULL-UP PORTGPA REGISTER
U-0
U-0
R/W-1
U-0
R/W-1
R/W-1
R/W-1
R/W-1
—
—
WPUA5
—
WPUA3
WPUA2
WPUA1
WPUA0
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘0’
bit 5
WPUA5: Weak Pull-up Register bit
1
= Pull-up enabled.
0
= Pull-up disabled.
bit 4
Unimplemented: Read as ‘0’
bit 3-0
WPUA<3:0>: Weak Pull-up Register bit
1
= Pull-up enabled.
0
= Pull-up disabled.
Note 1:
The weak pull-up device is enabled only when the global RAPU bit is enabled, the pin is in input mode
(TRISGPA = 1), and the individual WPUA bit is enabled (WPUA = 1), and the pin is not configured as an
analog input.
2:
GPA5 weak pull-up is also enabled when the pin is configured as MCLR in Configuration word.



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