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APFCON 数据表(PDF) 113 Page - Microchip Technology |
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APFCON 数据表(HTML) 113 Page - Microchip Technology |
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113 / 222 page ![]() 2013 Microchip Technology Inc. DS22331A-page 113 MCP19111 REGISTER 19-5: ANSELA: ANALOG SELECT PORTGPA REGISTER U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 — — — — ANSA3 ANSA2 ANSA1 ANSA0 bit 7 bit 0 Legend: R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-4 Unimplemented: Read as ‘0’ bit 3-0 ANSA<3:0>: Analog Select PORTGPA Register bit 1 = Analog input. Pin is assigned as analog input.(1) 0 = Digital I/O. Pin is assigned to port or special function. Note 1: Setting a pin to an analog input automatically disables the digital input circuitry, weak pull-ups, and interrupt-on-change if available. The corresponding TRIS bit must be set to Input mode in order to allow external control of the voltage on the pin. TABLE 19-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTGPA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ANSELA — — — — ANSA3 ANSA2 ANSA1 ANSA0 113 APFCON — — — — — — — CLKSEL 110 OPTION_REG RAPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 75 PORTGPA GPA7 GPA6 GPA5 GPA4 GPA3 GPA2 GPA1 GPA0 111 TRISGPA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 112 WPUGPA — —WPUA5 — WPUA3 WPUA2 WPUA1 WPUA0 112 Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used by PORTGPA. |
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