数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ACT7000SC 数据表(PDF) 19 Page - Aeroflex Circuit Technology

部件名 ACT7000SC
功能描述  ACT 7000SC 64-Bit Superscaler Microprocessor
PDF  25 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AEROFLEX [Aeroflex Circuit Technology]
网页  http://www.aeroflex.com
标志 AEROFLEX - Aeroflex Circuit Technology

ACT7000SC 数据表(HTML) 19 Page - Aeroflex Circuit Technology

Back Button ACT7000SC Datasheet HTML 15Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 16Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 17Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 18Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 19Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 20Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 21Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 22Page - Aeroflex Circuit Technology ACT7000SC Datasheet HTML 23Page - Aeroflex Circuit Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 25 page
background image
Aeroflex Circuit Technology
SCD7000SC REV B 7/30/01 Plainview NY (516) 694-6700
19
Power Consumption
Parameter
Condition
CPU Clock Speed
150 MHz
200 MHz
210 MHz
225 MHz
Typ1
Max2
Typ1
Max2
Typ1
Max2
Typ1
Max2
VccInt
Power
(mWatts)
Standby
No SysAD bus activity
500
1000
1500
2000
Active
R4000 write protocol with no
FPU operation
(integer Instruction only)
2200
4400
2700
5400
2800
5600
3800
7600
Write re-issue or pipelined
writes with superscalar
(integer and floating point
instructions)
2550
5100
3150
6300
3300
6600
4250
8500
Note 1: Typical integer instruction mix and cache miss rates with worst case supply voltage.
Note 2: Worst case instruction mix with worst case supply voltage.
Note: I/O supply power is application dependant, but typically <10% of VccInt.
AC Electrical Characteristics – Clock Parameters
Parameter
Symbol
Test
Condition
CPU Clock Speed
Units
150 MHz
200 MHz
210 MHz
225 MHz
Min
Max
Min
Max
Min
Max
Min
Max
SysClock High
tSCHIGH
Transition < 5ns
3333
ns
SysClock Low
tSCLOW
Transition < 5ns
3333
ns
SysClock Frequency
25
75
25
75
25
70
25
75
MHz
SysClock Period
tSCP
40
40
40
40
ns
Clock Jitter for SysClock
tJITTERIN
±200
±200
±150
±150
ps
SysClock Rise Time
tSCRISE
2222
ns
SysClock Fall Time
tSCFALL
2222
ns
ModeClock Period
tMODECKP
256
256
256
256
tSCP
JTAG Clock Period
tJTAGCKP
4444
tSCP
Note:
Operation of the ACT 7000 is only guaranteed with the Phase Lock Loop enabled



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com