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ADE7763ARSZ 数据表(PDF) 31 Page - Analog Devices

部件名 ADE7763ARSZ
功能描述  Single-Phase Active and Apparent Energy Metering IC
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE7763ARSZ 数据表(HTML) 31 Page - Analog Devices

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Data Sheet
ADE7763
Rev. C | Page 31 of 56
LINE CYCLE ENERGY ACCUMULATION MODE
In line cycle energy accumulation mode, the energy accumu-
lation of the ADE7763 can be synchronized to the Channel 2
zero crossing so that active energy accumulates over an integral
number of half line cycles. The advantage of summing the active
energy over an integral number of line cycles is that the
sinusoidal component in the active energy is reduced to 0. This
eliminates ripple in the energy calculation. Energy is calculated
more accurately and in a shorter time because the integration
period is shortened. By using the line cycle energy accumulation
mode, the energy calibration can be greatly simplified, and the
time required to calibrate the meter can be significantly reduced.
The ADE7763 is placed in line cycle energy accumulation mode
by setting Bit 7 (CYCMODE) in the mode register. In line cycle
energy accumulation mode, the ADE7763 accumulates the
active power signal in the LAENERGY register (Address 0x04)
for an integral number of line cycles, as shown in Figure 61. The
number of half line cycles is specified in the LINECYC register
(Address 0x1C). The ADE7763 can accumulate active power for
up to 65,535 half line cycles. Because the active power is
integrated on an integral number of line cycles, the CYCEND
flag in the interrupt status register is set (Bit 2) at the end of a
line cycle energy accumulation cycle. If the CYCEND enable bit
in the interrupt enable register is enabled, the IRQ output also
will go active low. Therefore, the IRQ line can also be used to
signal the completion of the line cycle energy accumulation.
Another calibration cycle can start as long as the CYCMODE
bit in the mode register is set.
From Equations 13 and 18,


nT
nT
dt
t
f
f
VI
dt
VI
t
E
0
2
0
)
2
cos(
9
.
8
1
)
(
(20)
where:
n is an integer.
T is the line cycle period.
Since the sinusoidal component is integrated over an integral
number of line cycles, its value is always 0. Therefore,
nT
VIdt
E
0
0
(21)

Et
VInT
(22)
Note that in this mode, the 16-bit LINECYC register can hold a
maximum value of 65,535. In other words, the line energy
accumulation mode can be used to accumulate active energy for
a maximum duration of 65,535 half line cycles. At 60 Hz line
frequency, this translates to a total duration of 65,535/
120 Hz = 546 seconds.
POSITIVE-ONLY ACCUMULATION MODE
In positive-only accumulation mode, the active energy
accumulation is only done for positive power, ignoring any
occurrence of negative power above or below the no-load
threshold, as shown in Figure 62. The CF pulse also reflects this
accumulation method when in this mode. Positive-only
accumulation mode is activated by setting the MSB of the mode
register (MODE[15]) and effects only the active power. The
default setting for this mode is off. Transitions in the direction
of power flow, going from negative to positive or positive to
negative, set the IRQ pin to active low if the PPOS and PNEG
bits are set in the interrupt enable register. The corresponding
PPOS and PNEG bits in the interrupt status register show
which transition has occurred—see the register descriptions in
Table 9.
PNEG
PPOS
PPOS
INTERRUPT STATUS REGISTERS
PPOS
PNEG
PNEG
IRQ
NO-LOAD
THRESHOLD
ACTIVE POWER
NO-LOAD
THRESHOLD
ACTIVE ENERGY
Figure 62. Energy Accumulation in Positive-Only Accumulation Mode
NO-LOAD THRESHOLD
The ADE7763 includes a no-load threshold feature on the
active energy that eliminates any creep effects in the meter. This
is accomplished because energy does not accumulate if the
multiplier output is below the no-load threshold. This threshold
is 0.001% of the full-scale output frequency of the multiplier.
Compare this value to the IEC1036 specification, which states
that the meter must start up with a load equal to or less than
0.4% Ib. This standard translates to 0.0167% of the full-scale
output frequency of the multiplier.



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