SL40307A-R19KHF datasheet(27/53 Pages) IRF

27 / 53 page

IR3846

27 www.irf.com

August 01, 2013

Vsns voltage is set by the voltage divider connected to

the output and it can be programmed externally.

Figure 27 shows the timing diagram for OVP in non-

tracking mode.

Figure 27: Timing Diagram for OVP in non-tracking

mode

SOFT-START / SOFT-STOP (S_CTRL)

S_Ctrl allows for the gradual charging and discharging

of Vout to its final value by controlling the Soft-Start

and Soft-Stop functions. Soft-Start and Soft-Stop is

the gradual charging and discharging of Vout,

respectfully. Both functions use the internal Intl_SS

ramp to regulate the rate Vout charges and

discharges. Soft-Start feature is enabled when S_Ctrl

and EN are asserted high. S_Ctrl is internally pulled

high, so that EN typically controls the rise of Vout. To

delay the charging of Vout, keep S_Ctrl low while

setting EN. Then assert S_Ctrl high to initiate the

Intl_SS ramp (Soft-Start). Vout follows Intl_SS and

ramps up until it reaches its steady state. For Soft-

Stop, S_Ctrl needs to be pulled low before EN goes

low. When S_Ctrl falls below its lower threshold,

Intl_SS becomes a decreasing ramp with the same

rate as the Soft-Start ramp. Vout follows this ramp and

discharges softly until completely shut down. Figure

28 shows the timing diagram of S_Ctrl controlled soft-

start and soft-stop.

If the Enable pin goes low before S_Ctrl, the converter

shuts down without Soft-Stop. Both gate drivers are

turned off immediately and Vout discharges to zero.

Figure 29 shows the timing diagram of Enable

controlled soft-start and soft-stop.

Intl

_SS

S_Ctrl

Vout

Enable

0.15V

0.65V

0.15V

0.65V

Figure 28: Timing Diagram for S_Ctrl controlled Soft-

Start / Soft-Stop

Intl

_SS

S_Ctrl

Vout

0.15V

Enable

1.2V

1.0V

0.65V

Figure 29: Timing Diagram for Enable controlled Soft-

Start / Shutdown

BODY BRAKING

The Body Braking feature of the IR3846 allows

improved transient response for step-down load

transients. A severe step-down load transient would

cause an overshoot in the output voltage and drive the

Comp pin voltage down until control saturation occurs

demanding 0% duty cycle and the PWM input to the

Control FET driver is kept OFF. When the first such

skipped pulse occurs, the IR3846 enters Body Braking

mode, wherein the Sync FET also turned OFF. The

inductor current then decays by freewheeling through

the body diode of the Sync FET. Thus, with Body

Braking, the forward voltage drop of the body diode

provides and additional voltage to discharge the

inductor current faster to the light load value as shown

in equation (3) and equation (4) below:

SL40307A-R19KHF 数据表(PDF) 27 Page - International Rectifier

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