P8044AH-R0117 datasheet(48/65 Pages) INNOVASIC

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IA8044/IA8344

Data Sheet

SDLC Communications Controller

March 30, 2010

IA211010112-04

http://www.Innovasic.com

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Page 48 of 65

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4.15.2 BYP

The BYP contains registers and controllers used to perform the manipulations required for SDLC

communications. The BYP registers may be accessed by the CPU (see Table 7, SFR Bit

Addressable Locations). The BYP contains the SIU state machine that controls transmission and

reception of frames.

4.16

Diagnostics

A diagnostic mode is included with the IA8044/IA8344 to allow testing of the SIU. Diagnostics

use port pins P3.0 and P3.1. Writing a ―0‖ to P3.1 enables the diagnostic mode. When P3.1 is

cleared, writing data to P3.0 has the effect of writing a serial data stream to the SIU. P3.0 is the

serial data and any write to Port 3 will clock SCLK. The transmit data may be monitored on P3.1

with any write to Port 3, again clocking SCLK. In the test mode P3.0 and P3.1 pins are placed in

the high impedance state (see Figure 12).

P8044AH-R0117 数据表(PDF) 48 Page - InnovASIC, Inc