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AM186ES-40VCW 数据表(PDF) 51 Page - Advanced Micro Devices

部件名 AM186ES-40VCW
功能描述  High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers
PDF  102 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM186ES-40VCW 数据表(HTML) 51 Page - Advanced Micro Devices

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Am186/188ES and Am186/188ESLV Microcontrollers
51
P R E L IMINA R Y
PULSE WIDTH DEMODULATION
For many applications, such as bar-code reading, it is
necessary to measure the width of a signal in both its
High and Low phases. The Am186ES and Am188ES
microcontrollers provide a pulse-width demodulation
(PWD) option to fulfill this need. The PWD bit in the
system configuration register (SYSCON) enables the
PWD option. Please note that the Am186ES and
Am188ES microcontrollers do not support analog-to-
digital conversion.
In PWD mode, TMRIN0, TMRIN1, INT2, and INT4 are
configured internal to the microcontroller to support the
detection of rising and falling edges on the PWD input
pin (INT2/INTA0/PWD) and to enable either timer 0
when the signal is High or timer 1 when the signal is
Low. The INT4, TMRIN0, and TMRIN1 pins are not
used in PWD mode and so are available for use as
PIOs.
The following diagram shows the behavior of a system
for a typical waveform.
The interrupt service routine (ISR) for the INT2 and
INT4 interrupts should examine the current count of the
associated timer, timer 1 for INT2 and timer 0 for INT4,
in order to determine the pulse width. The ISR should
then reset the timer count register in preparation for the
next pulse.
Since the timers count at one quarter of the processor
clock rate, this determines the maximum resolution that
can be obtained. Further, in applications where the
pulse width may be short, it may be necessary to poll
the INT2 and INT4 request bits in the interrupt request
register in order to avoid the overhead involved in tak-
ing and returning from an interrupt. Overflow condi-
tions, where the pulse width is greater than the
maximum count of the timer, can be detected by mon-
itoring the Maximum Count (MC) bit in the associated
timer or by setting the INT bit to enable timer interrupt
requests.
ASYNCHRONOUS SERIAL PORTS
The Am186ES and Am188ES microcontrollers provide
two independent asynchronous serial ports. These
ports provide full-duplex, bidirectional data transfer
using several industry-standard communications pro-
tocols. The serial ports can be used as sources or des-
tinations of DMA transfers.
The asynchronous serial ports support the following
features:
n Full-duplex operation
n 7-bit, 8-bit, or 9-bit data transfers
n Odd, even, or no parity
n One stop bit
n Two lengths of break characters
n Error detection
— Parity errors
— Framing errors
— Overrun errors
n Hardware handshaking with the following select-
able control signals:
— Clear-to-send (CTS)
— Enable-receiver-request (ENRX)
— Ready-to-send (RTS)
— Ready-to-receive (RTR)
n DMA to and from the serial ports
n Separate maskable interrupts for each port
n Multidrop protocol (9-bit) support
n Independent baud rate generators
n Maximum baud rate of 1/16th of the CPU clock
n Double-buffered transmit and receive
DMA Transfers through the Serial Port
The Am186ES and Am188ES microcontrollers support
DMA transfers both to and from the serial port. Either
or both DMA channels and either or both serial ports
can be used for DMA transmits or receives. See the
DMA Control register descriptions in the
Am186ES and
Am188ES Microcontrollers User’s Manual for more in-
formation.
INT2
INT4
INT2
Ints generated
TMR1 enabled
TMR0 enabled



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