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AM186ES-40VCW 数据表(PDF) 80 Page - Advanced Micro Devices

部件名 AM186ES-40VCW
功能描述  High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers
PDF  102 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM186ES-40VCW 数据表(HTML) 80 Page - Advanced Micro Devices

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Am186/188ES and Am186/188ESLV Microcontrollers
PRELIMIN ARY
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges
PSRAM Refresh Cycle (20 MHz and 25 MHz)
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA, unless otherwise noted. All output test conditions
are with CL=50 pF. For switching tests, VIL=0.45 V and VIH=2.4 V, except at X1 where VIH=VCC– 0.5 V.
a
Testing is performed with equal loading on referenced pins.
Parameter
Preliminary
Unit
20 MHz
25 MHz
No.
Symbol
Description
Min
Max
Min
Max
General Timing Responses
9tCHLH
ALE Active Delay
25
20
ns
10
tLHLL
ALE Width
tCLCL–10=40
tCLCL–10=30
ns
11
tCHLL
ALE Inactive Delay
25
20
ns
Read/Write Cycle Timing Responses
25
tCLRL
RD Active Delay
0
25
0
20
ns
26
tRLRH
RD Pulse Width
2tCLCL–15=85
2tCLCL–15=65
ns
27
tCLRH
RD Inactive Delay
0
25
0
20
ns
28
tRHLH
RD Inactive to ALE High(a)
tCLCH–3
tCLCH–3
ns
80
tCLCLX
LCS Inactive Delay
0
25
0
20
ns
81
tCLCSL
LCS Active Delay
0
25
0
20
ns
Refresh Timing Cycle Parameters
79
tCLRFD
CLKOUTA Low to RFSH Valid
025020
ns
82
tCLRF
CLKOUTA High to RFSH Invalid
0
25020
ns
85
tRFCY
RFSH Cycle Time
6
• t
CLCL
6
• t
CLCL
ns
86
tLCRF
LCS Inactive to RFSH Active
Delay
2tCLCL–3
2tCLCL–3



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