AM186ES-40VCW datasheet(52/102 Pages) AMD

52 / 102 page

Am186/188ES and Am186/188ESLV Microcontrollers

PRELIMINA R Y

PROGRAMMABLE I/O (PIO) PINS

There are 32 pins on the Am186ES and Am188ES mi-

crocontrollers that are available as user-programmable

I/O signals. Table 2 on page 34 and Table 3 on

page 34 list the PIO pins. Each of these pins can be

used as a user-programmable input or output signal if

the normal shared function is not needed.

If a pin is enabled to function as a PIO signal, the pre-

assigned signal function is disabled and does not affect

the level on the pin. A PIO signal can be configured to

operate as an input or output with or without a weak

pullup or pulldown, or as an open-drain output.

After power-on reset, the PIO pins default to various

configurations. The column titled

Power-On Reset Sta-

tus in Table 2 on page 34 and Table 3 on page 34 lists

the defaults for the PIOs. The system initialization code

must reconfigure the PIOs as required.

The A19–A17 address pins default to normal operation

on power-on reset, allowing the processor to correctly

begin fetching instructions at the boot address

FFFF0h. The DT/R, DEN, and SRDY pins also default

to normal operation on power-on reset.

Note that emulators use A19, A18, A17, S6, and UZI.

In environments where an emulator is needed, these

pins must be configured for normal function—not as

PIOs.

If the AD15–AD0 bus override is enabled on power-on

reset, then S6/CLKDIV2 and UZI revert to normal oper-

ation instead of PIO input with pullup. If BHE/ADEN

(186) or RFSH2/ADEN (188) is held Low during power-

on reset, the AD15–AD0 bus override is enabled.

AM186ES-40VCW 数据表(PDF) 52 Page - Advanced Micro Devices