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DAC5687IPZP 数据表(PDF) 30 Page - Texas Instruments |
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DAC5687IPZP 数据表(HTML) 30 Page - Texas Instruments |
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30 / 79 page  www.ti.com Register Name: QMCB_GAIN_0—Address: 0x14, Default = 0x00 Register Name: QMC_PHASE_0—Address: 0x15, Default = 0x00 Register Name: QMC_PHASE_GAIN_1—Address: 0x16, Default = 0x00 Register Name: DACA_GAIN_0—Address: 0x17, Default = 0x00 Register Name: DACB_GAIN_0—Address: 0x18, Default = 0x00 Register Name: DACA_DACB_GAIN_1—Address: 0x19, Default = 0xFF DAC5687 SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006 BIT 7 BIT 0 qmc_gain_b(7:0) 0 0 0 0 0 0 0 0 qmc_gain_b(7:0): Bits 7:0 of the QMC B path gain word. Updates to this register do not take effect until DACA_OFFSET_0 has been written. BIT 7 BIT 0 qmc_phase(7:0) 0 0 0 0 0 0 0 0 qmc_phase(7:0): Bits 7:0 of the QMC phase word. Updates to this register do not take effect until DACA_OFFSET_0 has been written. BIT 7 BIT 0 qmc_phase(9:8) qmc_gain_a(10:8) qmc_gain_b(10:8) 0 0 0 0 0 0 0 0 qmc_phase(9:8): Bits 9:8 of the QMC phase word. Updates to this register do not take effect until DACA_OFFSET_0 has been written. qmc_gain_a(10:8): Bits 10:8 of the QMC A path gain word. Updates to this register do not take effect until DACA_OFFSET_0 has been written. qmc_gain_b(10:8): Bits 10:8 of the QMC B path gain word. Updates to this register do not take effect until DACA_OFFSET_0 has been written. BIT 7 BIT 0 daca_gain(7:0) 0 0 0 0 0 0 0 0 daca_gain(7:0): Bits 7:0 of the DAC A gain adjustment word. BIT 7 BIT 0 dacb_gain(7:0) 0 0 0 0 0 0 0 0 dacb_gain(7:0): Bits 7:0 of the DAC B gain adjustment word. BIT 7 BIT 0 daca_gain(11:8) dacb_gain(11:8) 1 1 1 1 1 1 1 1 daca_gain(11:8): Bits 11:8 of the DAC A gain word. Four MSBs of gain control for DAC A. dacb_gain(11:8): Bits 11:8 of the DAC B gain word. Four MSBs of gain control for DAC B. 30 Submit Documentation Feedback Copyright © 2005–2006, Texas Instruments Incorporated Product Folder Link(s): DAC5687 |
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