DAC5687IPZP datasheet(7/79 Pages) TI

7 / 79 page

www.ti.com

DAC5687

SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006

ELECTRICAL CHARACTERISTICS (DC SPECIFICATIONS) (continued)

over recommended operating free-air temperature range, AVDD = 3.3 V, CLKVDD = 3.3 V, PLLVDD = 3.3 V, IOVDD = 3.3 V,

DVDD = 1.8 V, IOUTFS = 19.2 mA (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLY

AVDD

Analog supply voltage

3.3

3.6

DVDD

Digital supply voltage

1.71

1.8

2.15

CLKVDD

Clock supply voltage

3.3

3.6

IOVDD

I/O supply voltage

1.71

3.6

PLLVDD

PLL supply voltage

3.3

3.6

Mode 5(5)

IAVDD

Analog supply current

Mode 6(5)

IDVDD

Digital supply current(5)

Mode 6(5)

587

ICLKVDD

Clock supply current(5)

Mode 6(5)

IPLLVDD

PLL supply current(5)

Mode 6(5)

IIOVDD

IO supply current(5)

Mode 6(5)

Sleep mode (SLEEP pin high), CLK2 = 500

IAVDD

Sleep mode AVDD supply current

MHz

Sleep mode (SLEEP pin high), CLK2 = 500

IDVDD

Sleep mode DVDD supply current

MHz

Sleep mode CLKVDD supply

Sleep mode (SLEEP pin high), CLK2 = 500

ICLKVDD

0.25

current

MHz

Sleep mode (SLEEP pin high), CLK2 = 500

IPLLVDD

Sleep mode PLLVDD supply current

0.6

MHz

Sleep mode (SLEEP pin high), CLK2 = 500

IIOVDD

Sleep mode IOVDD supply current

0.6

MHz

Mode 1(5) AVDD = 3.3 V, DVDD = 1.8 V

750

Mode 2(5) AVDD = 3.3 V, DVDD = 1.8 V

910

Mode 3(5) AVDD = 3.3 V, DVDD = 1.8 V

760

Mode 4(5) AVDD = 3.3 V, DVDD = 1.8 V

1250

Power dissipation

Mode 5(5) AVDD = 3.3 V, DVDD = 1.8 V

1250

Mode 6(5) AVDD = 3.3 V, DVDD = 1.8 V

1410

Mode 7(5) AVDD = 3.3 V, DVDD = 1.8 V

1400

1750

Sleep mode (SLEEP pin high), CLK2 = 500

MHz

APSRR

–0.2

0.2

%FSR/V

Power supply rejection ratio

DPSRR

–0.2

0.2

%FSR/V

(5)

MODE 1 – MODE 7:

a. Mode 1: X2, PLL off, CLK2 = 320 MHz, DACA and DACB on, IF = 5 MHz

b. Mode 2: X4 QMC, PLL on, CLK1 = 125 MHz, DACA and DACB on, IF = 5 MHz

c. Mode 3: X4 CMIX, PLL off, CLK2 = 500 MHz, DACA off and DACB on, IF = 150 MHz

d. Mode 4: X4L FMIX CMIX, PLL off, CLK2 = 500 MHz, DACA off and DACB on, IF = 150 MHz

e. Mode 5: X4L FMIX CMIX, PLL on, CLK1 = 125 MHz, DACA off and DACB on, IF = 150 MHz

f. Mode 6: X4L FMIX CMIX, PLL on, CLK1 = 125 MHz, DACA on and DACB on, IF = 150 MHz

g. Mode 7: X8 FMIX CMIX, PLL on, CLK1 = 62.5 MHz, DACA and DACB on, IF = 150 MHz

Submit Documentation Feedback

Product Folder Link(s): DAC5687

DAC5687IPZP 数据表(PDF) 7 Page - Texas Instruments

DAC5687IPZP 数据表(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

数据表下载

链接网址

DAC5687IPZP 数据表(PDF) 7 Page - Texas Instruments

DAC5687IPZP 数据表(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

数据表 下载

链接网址

数据表下载