FT313HQ-R datasheet(14/67 Pages) ETC2

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Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

4 Function Description

The FT313H is a USB2.0 compatible EHCI single port host controller which is mainly composed

of the following:



Microcontroller bus interface



SRAM bus interface mode



NOR bus interface mode



General multiplex bus interface mode



Interface mode lock



DMA controller



EHCI host controller



System clock



Power management



BCD mode

The functions for each block are briefly described in the following subsections.

4.1 Microcontroller Bus Interface

The FT313H has a fast advance general purpose interface to communicate with most types of

microcontrollers and microprocessors. This microcontroller interface is configured using pins

ALE/ADV_N and CLE to accommodate most types of interfaces. The bus interface supports 8-

bit and 16-bit, which can be configured using bit DATA_BUS_WIDTH. Three bus interface types

are selected using inputs ALE/ADV_N and CLE during power up, the RD_N /RE_N/OE_N and

CS_N/CE_N pins, or the RESET_N pin. Table 4.1 provides detail of bus configuration for each

mode. Table 4.2 shows pinout information of each bus interface.

Bus Mode

ALE/ADV_N

CLE

DATA_BUS

_WIDTH

Signal Description

SRAM 8-bit

HIGH

 A[7:0]: 8-bit address bus

 AD[7:0]: 8-bit data bus

 Write (WR_N), read (RD_N), chip

select (CS_N): control signals for

normal SRAM mode

 DACK: DMA acknowledge input

 DREQ: DMA request output

SRAM 16-bit

HIGH

 A[7:0]: 8-bit address bus

 AD[15:0]: 16-bit data bus

 Write (WR_N), read (RD_N), chip

select (CS_N): control signals for

normal SRAM mode

 DACK: DMA acknowledge input

 DREQ: DMA request output

NOR 8-bit

HIGH

LOW

 AD[7:0]: 8-bit data bus

 ADV_N, write enable, output enable,

chip select: control signals

NOR 16-bit

HIGH

LOW

 AD[15:0]: 16-bit data bus

 ADV_N, write enable, output enable,

chip select: control signals

General

Multiplex 8-bit

LOW

HIGH

 AD[7:0]: 8-bit data bus

 ALE, write(WR_N), read(RD_N), chip

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