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FT313HQ-R 数据表(PDF) 35 Page - List of Unclassifed Manufacturers

部件名 FT313HQ-R
功能描述  Future Technology Devices International Ltd
PDF  67 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

FT313HQ-R 数据表(HTML) 35 Page - List of Unclassifed Manufacturers

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Copyright © 2013 Future Technology Devices International Limited
35
Document No.: FT_000589
FT313H USB2.0 HS Host Controller Datasheet Version 1.2
Clearance No.: FTDI# 318
Bit
Name
Type
Default value
Description
1: enable DMA
0
DMA_ABORT
R/W
1'b0
DMA abort
0: DMA continuous running
1: DMA abort implement
Table 5-20 DMA configuration register
5.3.10
AUX_MEMADDR register (address = 98h)
Bit
Name
Type
Default
value
Description
[15: 0]
AUX_START_ADDR_MEM R/W
16’b0
Auxiliary start address of memory
read / write
When memory is occurred by DMA, use
auxiliary start address for PIO memory
access.
Table 5-21 AUX Memory address register
5.3.11
AUX_DATAPORT register (address = 9Ah)
Bit
Name
Type
Default value
Description
[15: 0]
AUX_DATA_PORT
R/W
16’b0
Auxiliary data port
When memory is occurred by DMA, use
auxiliary data port for PIO memory access.
Table 5-22 AUX data port register
5.3.12
SLEEPTIMER register (address = 9Ch)
Bit
Name
Type
Default value
Description
[15: 0]
SLEEP_TIMER
R/W
16’b0400
Sleep timer
When host controller detected USB bus has no
activity, the sleep timer will be started. When
timer reduce to zero, the BUSINACTIVE
interrupt will be generated, if the respective
enable bit in the HCINTEN register is set.
Default sleep timer is approximately 10ms.
Table 5-23 Sleep timer register
5.4 Interrupt registers
5.4.1 HCINTSTS register (address = A0h)
Bit
Name
Type
Default value
Description
[15: 8]
Reserved
RO
10’b0
-
7
WAKEUPINT
R/WC
1’b0
Wake up interrupt on device connect or



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