FT313HQ-R datasheet(65/67 Pages) ETC2

65 / 67 page

Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

Appendix A – References

Useful Application Notes

Appendix B - List of Figures and Tables

List of Figures

Figure 2-1 FT313H Block Diagram...................................................................................................3

Figure 3-1 Pin Configuration QFN64 (top-down view) ........................................................................7

Figure 3-2 Pin Configuration LQFP64 (top-down view) .......................................................................8

Figure 3-3 Pin Configuration TQFP64 (top-down view) .......................................................................9

Figure 6-1 Read in SRAM mode .................................................................................................... 47

Figure 6-2 Write in SRAM mode.................................................................................................... 47

Figure 6-3 Read in NOR mode ...................................................................................................... 49

Figure 6-6 Write in General Multiplex mode.................................................................................... 51

Figure 6-7 DMA read and write ..................................................................................................... 52

Figure 7-1 FT313H Chip Schematic ............................................................................................... 54

Figure 8-1 QFN Package Markings................................................................................................. 57

Figure 8-2 LQFP Package Markings................................................................................................ 58

Figure 8-3 TQFP Package Markings ............................................................................................... 59

Figure 8-4 QFN-64 Package Markings ............................................................................................ 60

Figure 8-5 LQFP-64 Package Markings ........................................................................................... 61

Figure 8-6 TQFP-64 Package Markings........................................................................................... 62

Figure 8-7 FT313H Solder Reflow Profile ........................................................................................ 63

List of Tables

Table 1-1 FT313H Numbers............................................................................................................2

Table 3-1 FT313H pin description.................................................................................................. 13

Table 4-1 Bus Configuration modes............................................................................................... 15

Table 4-2 Pin information of the bus interface ................................................................................ 15

Table 4-3 Clock frequency select .................................................................................................. 17

Table 4-5 power management configuration................................................................................... 18

Table 5-1 Overview of host controller specific registers.................................................................... 21

Table 5-2 Capability register ........................................................................................................ 21

Table 5-3 Structural parameter register......................................................................................... 21

Table 5-5 USB command register.................................................................................................. 24

Table 5-6 USB status register....................................................................................................... 25

Table 5-9 Periodic frame list base address register.......................................................................... 26

Table 5-10 Current asynchronous list address register..................................................................... 26

Table 5-11 Port status and control register .................................................................................... 29

Table 5-12 EOF time and asynchronous schedule sleep timer register ............................................... 30

Table 5-14 HW mode register....................................................................................................... 31

Table 5-15 Edge interrupt control register...................................................................................... 31

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