FT313HQ-R datasheet(18/67 Pages) ETC2

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Document No.: FT_000589

FT313H USB2.0 HS Host Controller Datasheet Version 1.2

Clearance No.: FTDI# 318

4.9 Power management

4.9.1 Power up and reset sequence

When VCC(I/O) and VCC(3V3) are on, an internal regulator will power on with VCC(3V3) on.

An internal POR pulse will be generated during the regulator power on, so that internal circuits

are in reset state until the regulator power is stable.

4.9.2 Power supply

Power supplies are defined in Table 4.4.

Symbol

Typical

Description

VCC(I/O)

1.8V, or 2.5V, or 3.3V

Supply for digital I/O pad

VCC(3V3)

3.3V

Supply for chip

Table 4-4 Power supply

4.9.3 ATX reference voltage

The ATX circuit provides a stable internal voltage reference (+1.2V) to bias the analog

circuitry. This circuit requires an accurate external reference resistor. Connect 12kΩ±1%

resistor between pins RREF and GND.

4.9.4 Power modes

Power management configuration defined in Table 4.5.

For each bit description, see CONFIG register.

OSC_EN

PLL_EN

HC_CLK_EN

Description

Operation mode

Suspend mode

Table 4-5 power management configuration

4.9.4.1 Operation mode

All power supplies are present. Host controller is active.

4.9.4.2 Suspend mode

All power supplies are present. Host controller goes to USB suspend.

The steps for the host suspend are as follows:

1. Clear the RS bit of the USBCMD register to stop the host controller from executing

schedule.

2. Set the PO_SUSP bit of the PORTSC register to force the host controller to go into

suspend.

3. Disable OSC_EN, PLL_EN and HC_CLK_EN bits of the CONFIG register to save power.

4. Clear the U_SUSP_U bit of the EOTTIME register to put the chip into suspend mode.

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