AD9853_15 datasheet(4/31 Pages) AD

4 / 31 page

OBSOLETE

AD9853

–4–

REV. C

PIN FUNCTION DESCRIPTIONS

Pin #

Pin Name

Pin Function

1, 7, 9, 10,

36, 39, 44 DGND

Digital Ground

2, 8, 37,

40, 43

DVDD

Digital Supply Voltage

Control Bus Clock

Bit Clock for Control Bus

Data

Control Bus Data In Control Bus Data In

FEC Enable

Enables/Disables FEC

Address Bit

Address Bit for Control Bus

11, 26, 31 Test Data Out

Factory Use—Serial Test Data

Out

12, 13

PLL GND

PLL Ground

PLL VCC

Supply Voltage for PLL

PLL Filter

PLL Loop Filter Connection

16, 19, 23 AGND

Analog Ground

No Connect

DAC Rset

Rset Resistor Connection

20, 22

AVDD

Analog Supply Voltage

DAC Baseline

DAC Baseline Voltage

IOUT

Analog Current Output of the

DAC

IOUTB

Complementary Analog Cur-

rent Output of the DAC

Test CLK

Factory Use—Scan Clock

Test Latch

Factory Use—Scan Latch

Test Data In

Factory Use—Serial Test Data

Test Data Enable

Factory Use—Serial Test Data

Enable, Grounded for Normal

Operation

RESET

Master Device Reset Function

CA Enable

Cable Amplifier Enable

CA Clock

Cable Amplifier Serial Control

Clock

CA Data

Cable Amplifier Serial Control

Data

REF CLK IN

Reference Clock Input

Data In

Input Serial Data Stream

TXENABLE

Pulse that Frames the Valid

Input Data Stream

PIN CONFIGURATION

44-Lead Metric Quad Flatpack

(S-44A)

40 39 38

36 35 34

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

12 13 14 15 16 17 18 19 20 21 22

CA ENABLE

RESET

TEST DATA OUT

TEST DATA

ENABLE

TEST DATA IN

TEST LATCH

TEST CLK

IOUTB

AD9853

IOUT

AGND

DGND

DVDD

CONTROL

BUS CLOCK

CONTROL

BUS DATA IN

FEC ENABLE

ADDRESS BIT

DGND

NC = NO CONNECT

DVDD

DGND

TEST DATA

OUT

TEST DATA OUT

ADDRESS BIT

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