数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD9853 数据表(PDF) 12 Page - Analog Devices

部件名 AD9853
功能描述  Programmable Digital QPSK/16-QAM Modulator
PDF  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9853 数据表(HTML) 12 Page - Analog Devices

Back Button AD9853_15 Datasheet HTML 8Page - Analog Devices AD9853_15 Datasheet HTML 9Page - Analog Devices AD9853_15 Datasheet HTML 10Page - Analog Devices AD9853_15 Datasheet HTML 11Page - Analog Devices AD9853_15 Datasheet HTML 12Page - Analog Devices AD9853_15 Datasheet HTML 13Page - Analog Devices AD9853_15 Datasheet HTML 14Page - Analog Devices AD9853_15 Datasheet HTML 15Page - Analog Devices AD9853_15 Datasheet HTML 16Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 31 page
background image
OBSOLETE
AD9853
–12–
REV. C
NOTES ON BURST TRANSMISSION OPERATION:
1. PACKET LENGTH = NUMBER OF INFORMATION BYTES, K
2. IN FEC MODE TXENABLE MUST BE KEPT HIGH FOR N
(K+2T) BYTES WHERE N IS THE NUMBER OF CODEWORDS
3. IF NECESSARY, ZERO FILL THE LAST CODEWORD TO REACH ASSIGNED K DATA BYTES PER CODEWORD
4. THE INPUT DATA IS SAMPLED AT THE BIT RATE FREQUENCY (fB) WITH THE FIRST SAMPLE TAKEN AT
SECONDS AFTER THE
RISING EDGE OF TXENABLE
5. PREAMBLE DELAY =
6. DATA RATE MUST BE EXACT SUB-MULTIPLE OF REFERENCE CLOCK.
1
2
(fB)
(# OF PREAMBLE BITS)
(BIT RATE FREQUENCY)
FRAME STRUCTURE: MIN TXENABLE LOW TIME = PREAMBLE + 8 SYMBOLS. (EQUATES TO 8 SYMBOLS
MINIMUM SPACING BETWEEN BURSTS WITH NO CHANGE IN PROFILE)
TXENABLE
NOTE: DATA RATE MUST BE PRECISELY
SYNCHRONIZED WITH RISING EDGE
OF TXENABLE
D1
D2
D3
D4
D5
D6
D7
DN
DON'T CARE
D1
D2
D3
D4
D5
D6
D7 DN
DON'T CARE
DATA PACKET = K BYTES
FEC PARITY
(2T BYTES)
FEC PARITY
(2T BYTES)
DATA PACKET = K BYTES
TXENABLE TO
AOUT LATENCY
DATA IN
INTERNAL CODE-
WORD STRUCTURE
AT R-S OUTPUT
FRAME STRUCTURE FOR MULTIPLE CODE WORDS OR CONTINOUS TRANSMISSION:
D1
D2
D3
D4
D5
D6
D7 DN
DON'T CARE
D1
D2
D3 D4
D5
D6
D7 DN
DON'T CARE
DATA PACKET = K BYTES
FEC PARITY
(2T BYTES)
DATA PACKET = K BYTES
FEC PARITY
(2T BYTES)
TXENABLE
DATA IN
INPUT DATA PROCESSING:
TXENABLE
D1
D59
DN
D60
D61
D62
D63
D64
D65
D1
D2
D2
D3
D4
D5
DATA
PACKET
AND
FEC PARITY
CODEWORD(S)
PREAMBLE
COMPLETE FRAME AS PRESENTED TO MODULATOR ENCODER:
INTERNAL
BIT CLOCK
DATA IN
ENCODER
INPUT
PREAMBLE LENGTH = 96 BITS MAXIMUM
DURING THIS INTERVAL THE DATA IS R-S ENCODED, RANDOMIZED, AND
DELAYED TO SYNCHRONIZE WITH THE END OF THE PREAMBLE DATA.
ONE CODEWORD
ONE CODEWORD
PREAMBLE INSERTION
Figure 26. Data Framing and Processing



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com