AD9853_15 datasheet(16/31 Pages) AD

16 / 31 page

OBSOLETE

AD9853

–16–

REV. C

receive end. The values actually programmed on the serial con-

trol bus are “K” and “t,” which will define N as shown in the

above code-word structure equation. As can be seen from the

code-word structure equation, two check bytes are required to

correct each byte error. Setting t = 0 and K > 0 will bypass the

Reed-Solomon encoding process.

Since Reed-Solomon works on bytes of information and not

bits, a single byte error can be as small as one inverted bit out of

a byte, or as large as eight inverted bits of one byte; in either

instance the result is one byte error. For example, if the value

“t” is specified as 5, the R-S FEC could be correcting as many

as 40, or as few as 05, erroneous bits, but those errors must be

contained in 5 message bytes. If the errors are spread among

more than five bytes, the message will not be fully error corrected.

When using the R-S encoder, the message data needs to be

partitioned or “gapped” with “don’t care” data for the time

duration of the check bytes as shown in the timing diagram of

Figure 26. During the intervals between message data, the de-

vice ignores data at the input.

The position of the R-S encoder in the coding data path can be

switched with the randomizer by exercising Register 1, Bit D3,

via the serial control bus.

RANDOMIZER FUNCTION

The next stage in the modulation chain is the randomizing or

“scrambling” stage. Randomizing is necessary due to the fact

that impairments in digital transmission can be a function of the

statistics of the digital source. Receiver symbol synchronization

is more easily maintained if the input sequence appears random

or equiprobable. Long strings of 0s or 1s can cause a bit or

symbol synchronizer to lose synchronization. If there are repeti-

tive patterns in the data, discrete spurs can be produced, caus-

ing interchannel interference. In modulation schemes relying on

suppressed carrier transmission, nonrandom data can increase

the carrier feedthrough. Using a randomizer effectively “whitens”

the data.

The technique used in the AD9853 to randomize the data is to

perform a modulo 2 logic addition of the data with a pseudo-

random sequence. The pseudorandom sequence is generated by

a shift register of length m with an exclusive OR combination of

the nth bit and the last (mth) bit of the shift register that is fed

back to the shift register input. By choosing the appropriate

feedback point, a maximal length sequence is generated. The

maximal length sequence will repeat after every 2

m clock cycles,

but appears effectively “random” at the output. The criterion

for maximal length is that the polynomial 1 + x

n + xm be irre-

ducible and prime over the Galois field. The AD9853 contains

the following two polynomial configurations in hardware:

15 + x14 +1 :MCNS (DOCSIS) compatible.

6 + x5 +1

:DAVIC/DVB compatible.

The seed value is fully programmable for both configurations.

The seed value is reset prior to each burst and is used to calcu-

late the randomizer bit, which is combined in an exclusive XOR

with the first bit of data from each burst. The first bit of data in

a burst is the MSB of the first symbol following the last symbol

of the internally generated preamble.

PREAMBLE INSERTION BLOCK

As shown in the block diagram of the AD9853, the circuit in-

cludes a programmable preamble insertion register. This register

is 96 bits long and is transmitted upon receiving the TXENABLE

signal. It is transmitted without being Reed-Solomon encoded

or scrambled. Ramp-up data, to allow for receiver synchroniza-

tion, is included as the first bits in the preamble, followed by

user burst profile or channel equalization information. The first

bit of R-S encoded and scrambled information data is timed to

immediately follow the last bit of preamble data.

For most modulation modes, a minimum preamble is required.

This minimum is one symbol, two bits for DQPSK or four bits

for either 16-QAM or D16-QAM. No preamble is required for

either FSK or QPSK.

In conformance with DAVIC/DVB standards, the preamble is

not differentially coded in DQPSK mode. However the pre-

amble data can be differentially precoded when loaded into the

preamble register. The last symbol of the preamble is used as

the reference point for the first internal differentially coded

symbol so the preamble and data will effectively be coded differ-

entially. In the D16-QAM mode, the preamble is always differ-

entially coded internally.

MODULATION ENCODER

The preamble, followed by the encoded and scrambled data is

then modulation encoded according to the selected modulation

format. The available modulation formats are FSK, QPSK,

DQPSK, 16-QAM and D16-QAM. The corresponding symbol

constellations support the interactive HFC cable specifications

called out by MCNS (DOCSIS), 802.14 and DAVIC/DVB.

The data arrives at the modulation encoder at the input bit rate

and is demultiplexed as modulation encoded symbols into sepa-

rate I and Q paths. For QPSK and DQPSK, the symbol rate is

one-half of the bit rate and each symbol is comprised of two

bits. For 16-QAM and D16-QAM, the symbol rate is one-

fourth the bit rate and each symbol is comprised of four bits. In

the FSK mode, although the 1 and 0 data is entered into the

serial data input, it effectively bypasses the encoding, scrambling

and modulation paths. The FSK data is directly routed to the

direct digital synthesizer (DDS) where it is used to switch the

DDS between two stored tuning words (F0:F1) to achieve FSK

modulation in a phase-continuous manner. By holding the input

at either 1 or 0, a single frequency continuous wave can be

output for system test or CW transmission purposes.

Differential encoding of data is frequently used to overcome

phase ambiguity error or a “false lock” condition that can be

introduced in carrier-recovery circuits used to demodulate the

signal. In straight QPSK and 16-QAM, the phase of the re-

ceived signal is compared to that of a “recovered carrier” of

known phase to demodulate the signal in a coherent manner. If

the phase of the recovered carrier is in error, then demodulation

will be in error. Differential encoding of data at the transmit end

eliminates the need for absolute phase coherency of the recov-

ered carrier at the receive end. If a coherent reference generated

by a phase lock loop experiences a phase inversion while de-

modulating in a differentially coded format, the errors would be

limited to the symbol during which the inversion occurred and

the following symbol. Differential coding uses the phase of the

“previously transmitted symbol” as a reference point to compare

to the current symbol. The change in phase from one symbol to

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