PIC16LC620-04SLASHSS datasheet(24/108 Pages) MICROCHIP

24 / 108 page

PIC16C62X

DS30235G-page 24

Preliminary

4.4

Indirect Addressing, INDF and FSR

Registers

The INDF register is not a physical register. Addressing

the INDF register will cause indirect addressing.

Indirect addressing is possible by using the INDF reg-

ister. Any instruction using the INDF register actually

accesses data pointed to by the ﬁle select register

(FSR). Reading INDF itself indirectly will produce 00h.

Writing to the INDF register indirectly results in a

no-operation (although status bits may be affected). An

effective 9-bit address is obtained by concatenating the

8-bit FSR register and the IRP bit (STATUS<7>), as

shown in Figure 4-15. However, IRP is not used in the

PIC16C62X.

A simple program to clear RAM location 20h-2Fh using

indirect addressing is shown in Example 4-1.

EXAMPLE 4-1:

INDIRECT ADDRESSING

movlw

0x20

;initialize pointer

movwf

FSR

;to RAM

clrf

INDF

;clear INDF register

incf

FSR

;inc pointer

btfss

FSR,4

;all done?

goto

;no clear next

;yes continue

CONTINUE:

FIGURE 4-15: DIRECT/INDIRECT ADDRESSING PIC16C62X

For memory map detail see (Figure 4-4, Figure 4-5, Figure 4-6 and Figure 4-7).

Note 1: The RP1 and IRP bits are reserved, always maintain these bits clear.

Data

Memory

Indirect Addressing

Direct Addressing

bank select

location select

(1)RP1 RP0

from opcode

IRP(1)

FSR register

bank select

location select

180h

1FFh

00h

7Fh

Bank 0

Bank 1

Bank 2

Bank 3

not used

PIC16LC620-04/SS 数据表(PDF) 24 Page - Microchip Technology

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