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L9779WD 数据表(PDF) 24 Page - STMicroelectronics |
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L9779WD 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 170 page ![]() Functional description L9779WD 24/170 DocID027452 Rev 5 VDD5 regulator is activated Tdelay_REG seconds later. After VDD5 exceeds the VDD_UV threshold and with typ. 1.0 ms delay, the V3V3 is activated also. The sensor supplies VTRK1, 2 are turned on together with VDD5. 6.2.2 Power-down sequence The system is switched off according to the status of KEY_ON, VB and power latch mode bit PWL_EN_N set by the µC, according to: En_L9779 = [(!PWL_EN_N AND PWL_EN_TIMEOUTN) OR KEY_ON] AND VB_UVN. The KEY_ON is the status of KEY_ON pin after deglitch filter time. En_L9779 represents the enable signals used by different blocks. The system will be switched off after a minimum deglitch filter time if the voltage at pin KEY_ON is below VKEYL and if power latch mode is not active i.e. PWL_EN_N =1. Otherwise, if the power latch mode is active PWL_EN_N=0, nothing happens until the power latch mode has finished by the µC writing PWL_EN_N=1. However L9779WD will wait for a maximum time-out time PWL_TIMEOUT for PWL_EN_N de-assertion after which the system will be forced to switch off. PWL_TIMEOUT can be enabled and configured by 3 bit PWL_TIMEOUT_CONF. For TNL description see Smart reset circuit description. The status of KEY_ON can be read through the bit KEY_ON_STATUS. After tKEY filter time the status of KEY_ON can be read through the bit KEY_ON_FLT also. All the supply outputs shall be switched-off simultaneously. If the supplied devices have particular sequencing requirements, external diodes or clamping devices will be used. During power down, whether the regulators are switched off at the same time as the main relay output or not is decided via the <PSOFF> bit. <PSOFF>='0' (default): simultaneous switching-off the regulators with the main-relay driver MRD <PSOFF>='1': regulators remain active when the main relay driver MRD will be switched off With this function it is possible to detect a stuck main relay. If conditions to switch off are satisfied when <PSOFF>='1', the MRD is switched off while the voltage regulators continue to operate as long as no under voltage is detected at VB. The RST pin is not asserted till VDD_UV. The µC measures the time passed since shutdown. If a certain time is exceeded, then a stuck main relay is detected and this fault is stored in the µC (not in the L9779WD). After this the µC turns off the voltage regulators by setting the bit <PSOFF> to '0' (reset state). With a stuck main relay the voltage at pin VB remains present at battery level with a current consumption of ILeak. Secure Engine Off function is that the engine can be directly switched off by the key-switch via a hardware path and without the help or interference of software or µC. Whenever the KEY_ON signal goes low the output stages mentioned in the following pages are disabled. In no power latch/no SEO mode the key-switch has direct shut-off access to the injector stages (OUT1-4 in L9779) and to the starter relay drivers (OUT13 and OUT14). |
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